Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

MAINTAINERS

@@ -663,6 +663,7 @@ Fabio Estevam <fabio.estevam@freescale.com>
 	mx53smd		i.MX53
 	mx6qsabresd	i.MX6Q
 	mx6qsabreauto	i.MX6Q
+	wandboard	i.MX6DL/S
 
 Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
 

arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c

@@ -46,17 +46,17 @@ static uint32_t dram_vals[] = {
 	0x00000000, 0x00000000, 0x00010101, 0x01010101,
 	0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101,
 	0x00000100, 0x00000100, 0x00000000, 0x00000002,
-	0x01010000, 0x05060302, 0x06005003, 0x0a0000c8,
-	0x02009c40, 0x0000030c, 0x0036a609, 0x031a0612,
+	0x01010000, 0x07080403, 0x06005003, 0x0a0000c8,
+	0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612,
 	0x02030202, 0x00c8001c, 0x00000000, 0x00000000,
 	0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
 	0x00012100, 0xffff0303, 0x00012100, 0xffff0303,
 	0x00000003, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000612, 0x01000F02,
-	0x06120612, 0x00000200, 0x00020007, 0xf5014b27,
-	0xf5014b27, 0xf5014b27, 0xf5014b27, 0x07000300,
-	0x07000300, 0x07000300, 0x07000300, 0x00000006,
+	0x06120612, 0x00000200, 0x00020007, 0xf4004a27,
+	0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07000300,
+	0x07000300, 0x07400300, 0x07400300, 0x00000005,
 	0x00000000, 0x00000000, 0x01000000, 0x01020408,
 	0x08040201, 0x000f1133, 0x00000000, 0x00001f04,
 	0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04,
@@ -77,14 +77,14 @@ static uint32_t dram_vals[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x00000000, 0x00010000, 0x00020304,
-	0x00000004, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00010000, 0x00030404,
+	0x00000003, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x01010000,
 	0x01000000, 0x03030000, 0x00010303, 0x01020202,
 	0x00000000, 0x02040303, 0x21002103, 0x00061200,
-	0x06120612, 0x04320432, 0x04320432, 0x00040004,
+	0x06120612, 0x04420442, 0x04420442, 0x00040004,
 	0x00040004, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x00010001
+	0x00000000, 0xffffffff
 
 /*
  * i.MX23 DDR at 133MHz

arch/arm/cpu/armv7/mx6/soc.c

@@ -61,6 +61,18 @@ u32 get_cpu_rev(void)
 	return (type << 12) | (reg + 0x10);
 }
 
+#ifdef CONFIG_REVISION_TAG
+u32 __weak get_board_rev(void)
+{
+	u32 cpurev = get_cpu_rev();
+	u32 type = ((cpurev >> 12) & 0xff);
+	if (type == MXC_CPU_MX6SOLO)
+		cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF);
+
+	return cpurev;
+}
+#endif
+
 void init_aips(void)
 {
 	struct aipstz_regs *aips1, *aips2;

arch/arm/imx-common/Makefile

@@ -32,6 +32,7 @@ COBJS-y	= iomux-v3.o timer.o cpu.o speed.o
 COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
 endif
 COBJS-$(CONFIG_CMD_BMODE) += cmd_bmode.o
+COBJS-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
 COBJS	:= $(sort $(COBJS-y))
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)

arch/arm/imx-common/cmd_hdmidet.c

@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Boundary Devices Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/mxc_hdmi.h>
+#include <asm/io.h>
+
+static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	struct hdmi_regs *hdmi	= (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+	u8 reg = readb(&hdmi->phy_stat0) & HDMI_PHY_HPD;
+	return (reg&HDMI_PHY_HPD) ? 0 : 1;
+}
+
+U_BOOT_CMD(hdmidet, 1, 1, do_hdmidet,
+	"detect HDMI monitor",
+	""
+);

arch/arm/imx-common/timer.c

@@ -48,9 +48,6 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp (gd->arch.tbl)
-#define lastinc (gd->arch.lastinc)
-
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
 	tick *= CONFIG_SYS_HZ;
@@ -70,7 +67,6 @@ static inline unsigned long long us_to_tick(unsigned long long usec)
 int timer_init(void)
 {
 	int i;
-	ulong val;
 
 	/* setup GP Timer 1 */
 	__raw_writel(GPTCR_SWR, &cur_gpt->control);
@@ -85,9 +81,8 @@ int timer_init(void)
 	i = __raw_readl(&cur_gpt->control);
 	__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
 
-	val = __raw_readl(&cur_gpt->counter);
-	lastinc = val / (MXC_CLK32 / CONFIG_SYS_HZ);
-	timestamp = 0;
+	gd->arch.tbl = __raw_readl(&cur_gpt->counter);
+	gd->arch.tbu = 0;
 
 	return 0;
 }
@@ -96,18 +91,11 @@ unsigned long long get_ticks(void)
 {
 	ulong now = __raw_readl(&cur_gpt->counter); /* current tick value */
 
-	if (now >= lastinc) {
-		/*
-		 * normal mode (non roll)
-		 * move stamp forward with absolut diff ticks
-		 */
-		timestamp += (now - lastinc);
-	} else {
-		/* we have rollover of incrementer */
-		timestamp += (0xFFFFFFFF - lastinc) + now;
-	}
-	lastinc = now;
-	return timestamp;
+	/* increment tbu if tbl has rolled over */
+	if (now < gd->arch.tbl)
+		gd->arch.tbu++;
+	gd->arch.tbl = now;
+	return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
 }
 
 ulong get_timer_masked(void)

arch/arm/include/asm/arch-mx6/mx6dl_pins.h

@@ -50,6 +50,8 @@
 #define NO_MUX_I                0
 #define NO_PAD_I                0
 enum {
+	MX6_PAD_CSI0_DAT10__UART1_TXD		= IOMUX_PAD(0x0360, 0x004C, 3, 0x0000, 0, 0),
+	MX6_PAD_CSI0_DAT11__UART1_RXD		= IOMUX_PAD(0x0364, 0x0050, 3, 0x08FC, 1, 0),
 	MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK = IOMUX_PAD(0x03B0, 0x009C, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
 	MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15	= IOMUX_PAD(0x03B4, 0x00A0, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
 	MX6_PAD_DI0_PIN2__IPU1_DI0_PIN2	= IOMUX_PAD(0x03B8, 0x00A4, 0, 0x0000, 0, PAD_CTL_DSE_120ohm),
@@ -90,6 +92,7 @@ enum {
 	MX6_PAD_EIM_D27__UART2_RXD		= IOMUX_PAD(0x0540, 0x0170, 4, 0x0904, 1, 0),
 	MX6_PAD_EIM_D28__I2C1_SDA		= IOMUX_PAD(0x0544, 0x0174, 1 | IOMUX_CONFIG_SION, 0x086C, 1, 0),
 	MX6_PAD_EIM_D28__GPIO_3_28		= IOMUX_PAD(0x0544, 0x0174, 5, 0x0000, 0, 0),
+	MX6_PAD_EIM_D29__GPIO_3_29		= IOMUX_PAD(0x0548, 0x0178, 5, 0x0000, 0, 0),
 	MX6_PAD_ENET_MDC__ENET_MDC		= IOMUX_PAD(0x05B8, 0x01E8, 1, 0x0000, 0,  0),
 	MX6_PAD_ENET_MDIO__ENET_MDIO		= IOMUX_PAD(0x05BC, 0x01EC, 1, 0x0810, 0, 0),
 	MX6_PAD_ENET_REF_CLK__ENET_TX_CLK	= IOMUX_PAD(0x05C0, 0x01F0, 1, 0x0000, 0, 0),

board/boundary/nitrogen6x/nitrogen6x.c

@@ -304,6 +304,9 @@ int board_mmc_init(bd_t *bis)
 	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
 
+	usdhc_cfg[0].max_bus_width = 4;
+	usdhc_cfg[1].max_bus_width = 4;
+
 	for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
 		switch (index) {
 		case 0:
@@ -328,11 +331,6 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-u32 get_board_rev(void)
-{
-	return 0x63000;
-}
-
 #ifdef CONFIG_MXC_SPI
 iomux_v3_cfg_t const ecspi1_pads[] = {
 	/* SS1 */

board/freescale/mx6qsabreauto/mx6qsabreauto.c

@@ -26,6 +26,7 @@
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/boot_mode.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <miiphy.h>
@@ -216,6 +217,23 @@ int board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_BMODE
+static const struct boot_mode board_boot_modes[] = {
+	/* 4 bit bus width */
+	{"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+	{NULL,   0},
+};
+#endif
+
+int board_late_init(void)
+{
+#ifdef CONFIG_CMD_BMODE
+	add_board_boot_modes(board_boot_modes);
+#endif
+
+	return 0;
+}
+
 int checkboard(void)
 {
 	int rev = mx6sabre_rev();

board/freescale/mx6qsabrelite/README

@@ -40,7 +40,7 @@ enter the following commands:
 
  MX6Q SABRELITE U-Boot > mmc dev 0
  MX6Q SABRELITE U-Boot > mmc read 0x10800000 0 200
- MX6Q SABRELITE U-Boot > sf probe 1
+ MX6Q SABRELITE U-Boot > sf probe
  MX6Q SABRELITE U-Boot > sf erase 0 0x40000
  MX6Q SABRELITE U-Boot > sf write 0x10800000 0 0x40000
 
@@ -63,7 +63,7 @@ https://wiki.linaro.org/Boards/MX6QSabreLite
 To build U-Boot for the SabreLite board:
 
  make mx6qsabrelite_config
- make u-boot.imx
+ make
 
 To copy the resulting u-boot.imx to the SD card:
 

board/freescale/mx6qsabrelite/mx6qsabrelite.c

@@ -274,6 +274,9 @@ int board_mmc_init(bd_t *bis)
 	usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 	usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
 
+	usdhc_cfg[0].max_bus_width = 4;
+	usdhc_cfg[1].max_bus_width = 4;
+
 	for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) {
 		switch (index) {
 		case 0:
@@ -298,11 +301,6 @@ int board_mmc_init(bd_t *bis)
 }
 #endif
 
-u32 get_board_rev(void)
-{
-	return 0x63000 ;
-}
-
 #ifdef CONFIG_MXC_SPI
 iomux_v3_cfg_t const ecspi1_pads[] = {
 	/* SS1 */

board/freescale/mx6qsabresd/mx6qsabresd.c

@@ -26,10 +26,12 @@
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/boot_mode.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <miiphy.h>
 #include <netdev.h>
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
@@ -145,21 +147,34 @@ struct fsl_esdhc_cfg usdhc_cfg[3] = {
 int board_mmc_getcd(struct mmc *mmc)
 {
 	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int ret = 0;
 
 	switch (cfg->esdhc_base) {
 	case USDHC2_BASE_ADDR:
-		return !gpio_get_value(USDHC2_CD_GPIO);
+		ret = !gpio_get_value(USDHC2_CD_GPIO);
+		break;
 	case USDHC3_BASE_ADDR:
-		return !gpio_get_value(USDHC3_CD_GPIO);
-	default:
-		return 1; /* eMMC/uSDHC4 is always present */
+		ret = !gpio_get_value(USDHC3_CD_GPIO);
+		break;
+	case USDHC4_BASE_ADDR:
+		ret = 1; /* eMMC/uSDHC4 is always present */
+		break;
 	}
+
+	return ret;
 }
 
 int board_mmc_init(bd_t *bis)
 {
 	int i;
 
+	/*
+	 * According to the board_mmc_init() the following map is done:
+	 * (U-boot device node)    (Physical Port)
+	 * mmc0                    SD2
+	 * mmc1                    SD3
+	 * mmc2                    eMMC
+	 */
 	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
 		switch (i) {
 		case 0:
@@ -239,11 +254,6 @@ int board_eth_init(bd_t *bis)
 	return 0;
 }
 
-u32 get_board_rev(void)
-{
-	return 0x63000;
-}
-
 int board_early_init_f(void)
 {
 	setup_iomux_uart();
@@ -259,6 +269,26 @@ int board_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_BMODE
+static const struct boot_mode board_boot_modes[] = {
+	/* 4 bit bus width */
+	{"sd2",	 MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
+	{"sd3",	 MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+	/* 8 bit bus width */
+	{"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
+	{NULL,	 0},
+};
+#endif
+
+int board_late_init(void)
+{
+#ifdef CONFIG_CMD_BMODE
+	add_board_boot_modes(board_boot_modes);
+#endif
+
+	return 0;
+}
+
 int checkboard(void)
 {
 	puts("Board: MX6Q-SabreSD\n");