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powerpc/b4860: Correct LIODN assignment for SRIO
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For B4, the SRIO LIODN registers are in SRIO address space and not
in GUTs.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
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fsl-liugang authored and York Sun committed Aug 9, 2013
1 parent b383102 commit 32f38ee
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Showing 2 changed files with 3 additions and 2 deletions.
4 changes: 2 additions & 2 deletions arch/powerpc/cpu/mpc85xx/b4860_ids.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,8 +41,8 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {

#ifdef CONFIG_SYS_SRIO
struct srio_liodn_id_table srio_liodn_tbl[] = {
SET_SRIO_LIODN_1(1, 307),
SET_SRIO_LIODN_1(2, 387),
SET_SRIO_LIODN_BASE(1, 307),
SET_SRIO_LIODN_BASE(2, 387),
};
int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
#endif
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1 change: 1 addition & 0 deletions arch/powerpc/include/asm/config_mpc85xx.h
Original file line number Diff line number Diff line change
Expand Up @@ -576,6 +576,7 @@
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
#define CONFIG_SYS_FSL_SRIO_LIODN
#else
#define CONFIG_MAX_CPUS 2
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
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