forked from gcc-mirror/gcc
-
Notifications
You must be signed in to change notification settings - Fork 0
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
2017-11-10 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.md (bswaphi2_reg): On ISA 3.0 systems, enable generating XXBRH if the value is in a vector register. (bswapsi2_reg): On ISA 3.0 systems, enable generating XXBRW if the value is in a vector register. (bswapdi2_reg): On ISA 3.0 systems, always use XXBRD to do register to register bswap64's instead of doing the GPR sequence used on previous machines. (bswapdi2_xxbrd): New insn. (bswapdi2_reg): Disallow on ISA 3.0. (register to register bswap64 splitter): Do not split the insn on ISA 3.0 systems that use XXBRD. [gcc/testsuite] 2017-11-10 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc.target/powerpc/p9-xxbr-3.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@254643 138bc75d-0d04-0410-961f-82ee72b054a4
- Loading branch information
meissner
committed
Nov 10, 2017
1 parent
5a259d5
commit 5e5f9f6
Showing
4 changed files
with
152 additions
and
14 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,99 @@ | ||
| /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ | ||
| /* { dg-require-effective-target powerpc_p9vector_ok } */ | ||
| /* { dg-options "-mpower9-vector -O2" } */ | ||
|
|
||
| /* Verify that the XXBR{H,W} instructions are generated if the value is | ||
| forced to be in a vector register, and XXBRD is generated all of the | ||
| time for register bswap64's. */ | ||
|
|
||
| unsigned short | ||
| do_bswap16_mem (unsigned short *p) | ||
| { | ||
| return __builtin_bswap16 (*p); /* LHBRX. */ | ||
| } | ||
|
|
||
| unsigned short | ||
| do_bswap16_reg (unsigned short a) | ||
| { | ||
| return __builtin_bswap16 (a); /* gpr sequences. */ | ||
| } | ||
|
|
||
| void | ||
| do_bswap16_store (unsigned short *p, unsigned short a) | ||
| { | ||
| *p = __builtin_bswap16 (a); /* STHBRX. */ | ||
| } | ||
|
|
||
| unsigned short | ||
| do_bswap16_vect (unsigned short a) | ||
| { | ||
| __asm__ (" # %x0" : "+v" (a)); | ||
| return __builtin_bswap16 (a); /* XXBRW. */ | ||
| } | ||
|
|
||
| unsigned int | ||
| do_bswap32_mem (unsigned int *p) | ||
| { | ||
| return __builtin_bswap32 (*p); /* LWBRX. */ | ||
| } | ||
|
|
||
| unsigned int | ||
| do_bswap32_reg (unsigned int a) | ||
| { | ||
| return __builtin_bswap32 (a); /* gpr sequences. */ | ||
| } | ||
|
|
||
| void | ||
| do_bswap32_store (unsigned int *p, unsigned int a) | ||
| { | ||
| *p = __builtin_bswap32 (a); /* STWBRX. */ | ||
| } | ||
|
|
||
| unsigned int | ||
| do_bswap32_vect (unsigned int a) | ||
| { | ||
| __asm__ (" # %x0" : "+v" (a)); | ||
| return __builtin_bswap32 (a); /* XXBRW. */ | ||
| } | ||
|
|
||
| unsigned long | ||
| do_bswap64_mem (unsigned long *p) | ||
| { | ||
| return __builtin_bswap64 (*p); /* LDBRX. */ | ||
| } | ||
|
|
||
| unsigned long | ||
| do_bswap64_reg (unsigned long a) | ||
| { | ||
| return __builtin_bswap64 (a); /* gpr sequences. */ | ||
| } | ||
|
|
||
| void | ||
| do_bswap64_store (unsigned long *p, unsigned int a) | ||
| { | ||
| *p = __builtin_bswap64 (a); /* STDBRX. */ | ||
| } | ||
|
|
||
| double | ||
| do_bswap64_double (unsigned long a) | ||
| { | ||
| return (double) __builtin_bswap64 (a); /* XXBRD. */ | ||
| } | ||
|
|
||
| unsigned long | ||
| do_bswap64_vect (unsigned long a) | ||
| { | ||
| __asm__ (" # %x0" : "+v" (a)); /* XXBRD. */ | ||
| return __builtin_bswap64 (a); | ||
| } | ||
|
|
||
| /* Make sure XXBR{H,W,D} is not generated by default. */ | ||
| /* { dg-final { scan-assembler-times "xxbrd" 3 } } */ | ||
| /* { dg-final { scan-assembler-times "xxbrh" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "xxbrw" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "ldbrx" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "lhbrx" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "lwbrx" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "stdbrx" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "sthbrx" 1 } } */ | ||
| /* { dg-final { scan-assembler-times "stwbrx" 1 } } */ |