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rm dead scanRight code
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ryan-williams committed Nov 11, 2017
1 parent 2bf6159 commit 2de7796
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Showing 4 changed files with 18 additions and 55 deletions.
2 changes: 1 addition & 1 deletion build.sbt
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ deps ++= Seq(
io % "3.0.0",
iterators % "2.0.0",
math % "2.1.0",
hammerlab("iterator-macros") % "1.1.0-SNAPSHOT",
hammerlab("iterator-macros") % "1.1.0",
paths % "1.3.1",
slf4j,
spark_util % "2.0.0",
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32 changes: 0 additions & 32 deletions src/main/scala/org/hammerlab/magic/rdd/scan/ScanRightRDD.scala
Original file line number Diff line number Diff line change
Expand Up @@ -181,37 +181,5 @@ trait ScanRightRDD {
total
)
}

def scanRight(identity: T,
includeCurrentValue: Boolean,
useRDDReversal: Boolean)(
combine: (T, T) T
): ScanRDD[T] =
scanRight(
identity,
combine,
combine,
includeCurrentValue,
useRDDReversal
)

}
}

object ScanRightRDD {
implicit class IncludeCurrentValue(val value: Boolean) extends AnyVal
trait LowPriorityIncludeCurrentValue {
implicit val True = IncludeCurrentValue(true)
}
object IncludeCurrentValue extends LowPriorityIncludeCurrentValue {
implicit val False = IncludeCurrentValue(false)
}

implicit class UseRDDReversal (val value: Boolean) extends AnyVal
trait LowPriorityUseRDDReversal {
implicit val False = UseRDDReversal(false)
}
object UseRDDReversal extends LowPriorityUseRDDReversal {
implicit val True = UseRDDReversal(true)
}
}
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,6 @@ package org.hammerlab.magic.rdd.scan
import cats.Monoid
import magic_rdds.scan._
import org.apache.spark.rdd.RDD
import org.hammerlab.magic.rdd.scan.ScanRightRDD.UseRDDReversal

import scala.reflect.ClassTag

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38 changes: 17 additions & 21 deletions src/test/scala/org/hammerlab/magic/rdd/scan/ScanRightRDDTest.scala
Original file line number Diff line number Diff line change
Expand Up @@ -33,17 +33,15 @@ abstract class ScanRightRDDTest(useRDDReversal: Boolean)

val rdd = sc.parallelize(seq, numPartitions)

val actual =
if (inclusive)
rdd
.scanRightValuesInclusive
.collect
else
rdd
.scanRightValues
.collect

actual should be(
val scanned =
(inclusive, useRDDReversal) match {
case ( true, true) rdd.scanRightValuesInclusive
case ( true, false) rdd.scanRightValuesInclusive(useRDDReversal)
case (false, true) rdd.scanRightValues
case (false, false) rdd.scanRightValues(useRDDReversal)
}

scanned.collect should be(
byKeysOutput
)
}
Expand All @@ -55,22 +53,20 @@ abstract class ScanRightRDDTest(useRDDReversal: Boolean)

val rdd = sc.parallelize(input.toSeq)

val actualArr =
if (inclusive)
rdd
.scanRightInclusive(useRDDReversal)
.collect()
else
rdd
.scanRight(useRDDReversal)
.collect()
val scanned =
(inclusive, useRDDReversal) match {
case ( true, true) rdd.scanRightInclusive
case ( true, false) rdd.scanRightInclusive(useRDDReversal)
case (false, true) rdd.scanRight
case (false, false) rdd.scanRight(useRDDReversal)
}

val expectedArr =
expectedOpt.getOrElse(
getExpected(input)
)

actualArr should be(expectedArr)
scanned.collect should be(expectedArr)
}
}

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