This is meant to enable better API stability if we add partial support for other CPU vendors,
such as VIA or Cyrix.

This module supports parsing the CPU family, model and stepping to identify the micro-architecture.
This requires listing all the known micro-architecture in the library.
(Recompilation will be needed to add support for new uarch)

Because Intel micro-architecture are rather messy, especially around Skylake, microarchitecture are mapped onto a structure referencing
- the vendor
- the CPU core design (or core design for hybrid CPUs such as Alder Lake)
- the micro-architecture codename of the SoC.

For instance AlderLake is {Intel, Heterogeneous{P: GoldenCove, E: Gracemont}, AlderLake}
All the different Skylake recycling are {Intel, Homogenous(Skylake), _)

As teh set of combination recognized is fixed at compile time, they are encoded as constants
and the function returns static references to the correct structure.
All the known combination are included in an array (MICRO_ARCHITECTURE_LIST)

The list of micro-architectures in the Enums is rather exhaustive but not definitive,
but only a token number of architectures are currently parsed.

- Export the uarch module
- Export the Vendor enum

- Split NetBurst between 32-bit and 64-bit architectures (the latter identified as Prescott)
- Fix typo on Willamette