Sync-20200811

src/debug/createdump/datatarget.cpp

@@ -89,7 +89,7 @@ DumpDataTarget::GetMachineType(
     *machine = IMAGE_FILE_MACHINE_ARM64;
 #elif _X86_
     *machine = IMAGE_FILE_MACHINE_I386;
-#elif defined(__mips64__)
+#elif _MIPS64_
 ////FIXME for MIPS.
     *machine = IMAGE_FILE_MACHINE_MIPS64;
 #else

src/jit/codegencommon.cpp

@@ -7030,7 +7030,6 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
 #endif // !UNIX_AMD64_ABI
 
 #elif defined(_TARGET_MIPS64_)
-        /* FIXME for MIPS */
 
         regNumber rAddr;
         regNumber rCnt = REG_NA; // Invalid
@@ -7130,19 +7129,20 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
         {
             if ((uCntBytes - REGSIZE_BYTES) == 0)
             {
-                getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 0);
+                getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, padding);
             }
             else
             {
-                getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, 0);
+                getEmitter()->emitIns_R_R_I(INS_sd, EA_PTRSIZE, REG_R0, rAddr, padding);
                 getEmitter()->emitIns_R_R_I(INS_daddiu, EA_PTRSIZE, rAddr, rAddr, REGSIZE_BYTES);
             }
             uCntBytes -= REGSIZE_BYTES;
         }
         if (uCntBytes > 0)
         {
             assert(uCntBytes == sizeof(int));
-            getEmitter()->emitIns_R_R_I(INS_sw, EA_4BYTE, REG_R0, rAddr, 0);
+            assert(padding == sizeof(int));
+            getEmitter()->emitIns_R_R_I(INS_sw, EA_4BYTE, REG_R0, rAddr, padding);
             uCntBytes -= sizeof(int);
         }
         noway_assert(uCntBytes == 0);

src/jit/emit.h

@@ -358,7 +358,11 @@ struct insGroup
             ptr -= sizeof(VARSET_TP);
         }
 
+#if defined(_TARGET_MIPS64_)
+        ptr -= sizeof(VARSET_TP);
+#else
         ptr -= sizeof(unsigned);
+#endif
 
         return *(unsigned*)ptr;
     }

src/jit/emitmips64.cpp

@@ -1925,20 +1925,16 @@ void emitter::emitIns_S_R(instruction ins, emitAttr attr, regNumber reg1, int va
     switch (ins)
     {
         case INS_sb:
-            assert(size == EA_1BYTE);
             break;
         case INS_sh:
-            assert(size == EA_2BYTE);
             break;
         case INS_sw:
         case INS_swc1:
         //case INS_swl:
         //case INS_swr:
-            assert(size == EA_4BYTE);
             break;
         case INS_sd:
         case INS_sdc1:
-            assert(size == EA_8BYTE);
             break;
 
         default:
@@ -1987,26 +1983,22 @@ void emitter::emitIns_R_S(instruction ins, emitAttr attr, regNumber reg1, int va
         case INS_sb:
         case INS_lb:
         case INS_lbu:
-            assert(size == EA_1BYTE);
             break;
 
         case INS_sh:
         case INS_lh:
         case INS_lhu:
-            assert(size == EA_2BYTE);
             break;
 
         case INS_sw:
         case INS_lw:
         case INS_lwu:
         case INS_lwc1:
-            assert(size == EA_4BYTE);
             break;
 
         case INS_sd:
         case INS_ld:
         case INS_ldc1:
-            assert(size == EA_8BYTE);
             //assert(isValidGeneralDatasize(size) || isValidVectorDatasize(size));
             break;
 
@@ -4711,9 +4703,9 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
         {
             instrDescJmp* jmp = (instrDescJmp*) id;
             //   bal 4
-            //   lui at, off-hi-16bits
-            //   ori at, at, off-lo-16bits
-            //   daddu  reg, at, ra
+            //   lui reg, off-hi-16bits
+            //   ori reg, reg, off-lo-16bits
+            //   daddu  reg, reg, ra
             ssize_t imm = 4;
             *(code_t *)dst = emitInsOps(INS_bal, nullptr, &imm);
             dst += 4;
@@ -4727,18 +4719,39 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
             assert(addrOffs < 0x7fffffff);
             assert(-((int64_t)1<<31) < addrOffs);
 
-            regs[0] = REG_AT;
+            //regs[0] = REG_AT;
+            regs[0] = jmp->idReg1();
 
             imm = addrOffs >> 16;
             *(code_t *)dst = emitInsOps(INS_lui, regs, &imm);
             dst += 4;
 
-            regs[1] = REG_AT;
+            if (id->idGCref() != GCT_NONE)
+            {
+                emitGCregLiveUpd(id->idGCref(), id->idReg1(), dst);
+            }
+            else
+            {
+                emitGCregDeadUpd(id->idReg1(), dst);
+            }
+
+            //regs[1] = REG_AT;
+            regs[1] = jmp->idReg1();
             *(code_t *)dst = emitInsOps(INS_ori, regs, (ssize_t*) &addrOffs);
             dst += 4;
 
-            regs[0] = jmp->idReg1();
-            //regs[1] = REG_AT;
+            if (id->idGCref() != GCT_NONE)
+            {
+                emitGCregLiveUpd(id->idGCref(), id->idReg1(), dst);
+            }
+            else
+            {
+                emitGCregDeadUpd(id->idReg1(), dst);
+            }
+
+            //regs[0] = jmp->idReg1();
+            //regs[1] = jmp->idReg1();
+            ////regs[1] = REG_AT;
             regs[2] = REG_RA;
             *(code_t *)dst = emitInsOps(INS_daddu, regs, nullptr);
 
@@ -8522,7 +8535,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
         ssize_t imm;
 
         // n * n bytes will store n bytes result
-        emitIns_R_R(ins, attr, src1->gtRegNum, src2->gtRegNum);
+        emitIns_R_R(ins, EA_SIZE(attr), src1->gtRegNum, src2->gtRegNum);
         emitIns_R(INS_mflo, attr, dst->gtRegNum);
 
         if (needCheckOv)
@@ -8545,7 +8558,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
             else
             {
                 emitIns_R(INS_mfhi, attr, REG_AT);
-                emitIns_R_R_I(attr == EA_8BYTE ? INS_dsra32 : INS_sra, attr, REG_T0, dst->gtRegNum, 31);
+                emitIns_R_R_I(EA_SIZE(attr) == EA_8BYTE ? INS_dsra32 : INS_sra, attr, REG_T0, dst->gtRegNum, 31);
 
                 imm = emitComp->fgUseThrowHelperBlocks() ? (7<<2) : (9 << 2);
                 emitIns_R_R_I(INS_beq, EA_PTRSIZE, REG_AT, REG_T0, imm);
@@ -8558,7 +8571,7 @@ regNumber emitter::emitInsTernary(instruction ins, emitAttr attr, GenTree* dst,
     }
     else if (dst->OperGet() == GT_DIV || dst->OperGet() == GT_UDIV || dst->OperGet() == GT_MOD || dst->OperGet() == GT_UMOD)
     {
-        emitIns_R_R(ins, attr, src1->gtRegNum, src2->gtRegNum);
+        emitIns_R_R(ins, EA_SIZE(attr), src1->gtRegNum, src2->gtRegNum);
 
         if (dst->OperGet() == GT_DIV || dst->OperGet() == GT_UDIV)
             emitIns_R(INS_mflo, attr, dst->gtRegNum);

src/pal/inc/pal_endian.h

@@ -101,8 +101,9 @@ inline void SwapGuid(GUID *pGuid)
 #ifdef _ARM_
 #define LOG2_PTRSIZE	2
 #define ALIGN_ACCESS    ((1<<LOG2_PTRSIZE)-1)
-#elif __mips64
+#elif _MIPS64_
 #define ALIGN_ACCESS    4
+#undef memcpy
 #endif
 
 #if defined(ALIGN_ACCESS) && !defined(_MSC_VER)

src/vm/codeman.cpp

@@ -1141,7 +1141,7 @@ PTR_VOID GetUnwindDataBlob(TADDR moduleBase, PTR_RUNTIME_FUNCTION pRuntimeFuncti
     {
         size = 4;
         epilogScopes = (xdata[0] >> 22) & 0x1f;
-        unwindWords = (xdata[0] >> 27) & 0x0f;
+        unwindWords = (xdata[0] >> 27) & 0x1f;
     }
     else 
     {

src/vm/mips64/asmhelpers.S

@@ -13,6 +13,14 @@ LEAF_ENTRY GetCurrentIP, _TEXT
     ori  v0, ra, 0
 LEAF_END GetCurrentIP, _TEXT
 
+// LPVOID __stdcall GetCurrentSP(void)//
+LEAF_ENTRY GetCurrentSP, _TEXT
+    .set noreorder
+    jr ra
+    ori  v0, sp, 0
+LEAF_END GetCurrentSP, _TEXT
+
+
 //-----------------------------------------------------------------------------
 // The following Macros help in WRITE_BARRIER Implemetations
 // WRITE_BARRIER_ENTRY
@@ -1370,6 +1378,7 @@ NESTED_END ExternalMethodFixupStub, _TEXT
 NESTED_ENTRY DelayLoad_MethodCall_FakeProlog, _TEXT, NoHandler
 DelayLoad_MethodCall:
     .global DelayLoad_MethodCall
+    .set noreorder
     PROLOG_WITH_TRANSITION_BLOCK
 
     ori a1, t8, 0      // Indirection cell
@@ -1380,15 +1389,12 @@ DelayLoad_MethodCall:
     daddu  t0, AT, t9
     daddiu  AT, t0, %lo(%neg(%gp_rel(DelayLoad_MethodCall_FakeProlog)))
     ld  t9, %call16(ExternalMethodFixupWorker)(AT)
-    daddiu a0, sp, __PWTB_TransitionBlock        // pTransitionBlock
     jalr  t9
-
-    //FIXME for MIPS: Is it needed transfering t9 or t2 ???
-    move t9, v0
+    daddiu a0, sp, __PWTB_TransitionBlock        // pTransitionBlock
 
     EPILOG_WITH_TRANSITION_BLOCK_TAILCALL
-    //// Share patch label
-    b ExternalMethodFixupPatchLabel
+    EPILOG_BRANCH_REG   v0
+    ori t9, v0, 0
 
 NESTED_END DelayLoad_MethodCall_FakeProlog, _TEXT
 
@@ -1421,12 +1427,12 @@ DelayLoad_Helper\suffix:
 
     ld  v0, __PWTB_ArgumentRegisters(sp)
     EPILOG_WITH_TRANSITION_BLOCK_RETURN
+    nop
 
 LOCAL_LABEL(FakeProlog\suffix\()_0):
-    move t9, v0
     EPILOG_WITH_TRANSITION_BLOCK_TAILCALL
-    EPILOG_BRANCH_REG  t9
-    nop
+    EPILOG_BRANCH_REG  v0
+    move t9, v0
 
 NESTED_END DelayLoad_Helper\suffix\()_FakeProlog, _TEXT
 .endm

src/vm/mips64/cgencpu.h

@@ -185,14 +185,7 @@ inline void SetRA(T_CONTEXT * context, TADDR ip) {
     context->Ra = ip;
 }
 
-inline  LPVOID __stdcall GetCurrentSP()
-{
-    LPVOID p;
-    __asm__ volatile (
-            "move %0, $29 \n"    //$29=sp
-            :"=r"(p)::);
-    return p;
-}
+extern "C" LPVOID __stdcall GetCurrentSP();
 
 inline void SetSP(T_CONTEXT *context, TADDR sp) {
     LIMITED_METHOD_DAC_CONTRACT;

src/vm/mips64/stubs.cpp

@@ -833,8 +833,8 @@ void TransitionFrame::UpdateRegDisplay(const PREGDISPLAY pRD)
     ClearRegDisplayArgumentAndScratchRegisters(pRD);
 
     // copy the control registers
-    pRD->pCurrentContext->Fp = pCalleeSaved->fp;
-    pRD->pCurrentContext->Ra = pCalleeSaved->ra;
+    //pRD->pCurrentContext->Fp = pCalleeSaved->fp;//not needed for duplicated.
+    //pRD->pCurrentContext->Ra = pCalleeSaved->ra;//not needed for duplicated.
     pRD->pCurrentContext->Pc = GetReturnAddress();
     pRD->pCurrentContext->Sp = this->GetSP();