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Refactor syntax-table modifier functions
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gmlarumbe committed Sep 12, 2024
1 parent a30077e commit 9c62665
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Showing 4 changed files with 47 additions and 29 deletions.
3 changes: 2 additions & 1 deletion verilog-ext-compile.el
Original file line number Diff line number Diff line change
Expand Up @@ -335,7 +335,8 @@ Supports verilator, vppreproc and iverilog."
(setq verilog-preprocessor (concat "iverilog -E -o" iver-out-file " __FILE__ && "
"echo \"\" && " ; Add blank line between run command and first preprocessed line
"cat " iver-out-file)))))
(verilog-preprocess)
(verilog-ext-with-syntax-table-underscore-word ; Required for `verilog-ts-mode' usage of `verilog-string-replace-matches' inside `verilog-expand-command'
(verilog-preprocess))
(pop-to-buffer "*Verilog-Preprocessed*")))


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6 changes: 2 additions & 4 deletions verilog-ext-hs.el
Original file line number Diff line number Diff line change
Expand Up @@ -88,10 +88,8 @@ See `hs-hide-block' and `hs-show-block'.
Argument E should be the event that triggered this action."
(interactive (list last-nonmenu-event))
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?` "w" table)
(with-syntax-table table
(hs-toggle-hiding e))))
(verilog-ext-with-syntax-table-tick-word
(hs-toggle-hiding e)))
((eq major-mode 'verilog-ts-mode)
(hs-toggle-hiding e))
(t
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12 changes: 4 additions & 8 deletions verilog-ext-nav.el
Original file line number Diff line number Diff line change
Expand Up @@ -60,10 +60,8 @@ Either `rg' or `ag' are implemented."
Move forward ARG words."
(interactive "p")
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?_ "_" table)
(with-syntax-table table
(forward-word arg))))
(verilog-ext-with-syntax-table-underscore-symbol
(forward-word arg)))
((eq major-mode 'verilog-ts-mode)
(forward-word arg))
(t
Expand All @@ -74,10 +72,8 @@ Move forward ARG words."
Move backward ARG words."
(interactive "p")
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?_ "_" table)
(with-syntax-table table
(backward-word arg))))
(verilog-ext-with-syntax-table-underscore-symbol
(backward-word arg)))
((eq major-mode 'verilog-ts-mode)
(backward-word arg))
(t
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55 changes: 39 additions & 16 deletions verilog-ext-utils.el
Original file line number Diff line number Diff line change
Expand Up @@ -173,6 +173,37 @@ ALIST keys are strings that define projects in `verilog-ext-project-alist'."
(declare (indent 0) (debug t))
`(setf (alist-get ,proj ,alist nil 'remove 'string=) ,value))

(defmacro verilog-ext-with-syntax-table (char newentry &rest body)
"Execute BODY with a `verilog-mode' syntax-table replacing CHAR with NEWENTRY."
(declare (indent 0) (debug t))
`(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ,char ,newentry table)
(with-syntax-table table
,@body)))

(defmacro verilog-ext-with-syntax-table-underscore-symbol (&rest body)
"Do not consider underscore part of a word boundary and execute BODY.
Needed for compatibility with `verilog-mode' syntax table."
(declare (indent 0) (debug t))
`(verilog-ext-with-syntax-table
?_ "_"
,@body))

(defmacro verilog-ext-with-syntax-table-underscore-word (&rest body)
"Do consider underscore part of a word boundary and execute BODY.
Needed for compatibility with `verilog-mode' syntax table."
(declare (indent 0) (debug t))
`(verilog-ext-with-syntax-table
?_ "w"
,@body))

(defmacro verilog-ext-with-syntax-table-tick-word (&rest body)
"Consider tick part of a word boundary and execute BODY.
Needed for compatibility with `verilog-mode' syntax table."
(declare (indent 0) (debug t))
`(verilog-ext-with-syntax-table
?` "w"
,@body))

;;;; Wrappers
(defun verilog-ext-forward-syntactic-ws ()
Expand Down Expand Up @@ -788,10 +819,8 @@ efficiency and be able to use it for features such as `which-func'."
Optional ARG sets number of words to kill."
(interactive "p")
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?_ "_" table)
(with-syntax-table table
(kill-word arg))))
(verilog-ext-with-syntax-table-underscore-symbol
(kill-word arg)))
((eq major-mode 'verilog-ts-mode)
(kill-word arg))
(t
Expand All @@ -802,10 +831,8 @@ Optional ARG sets number of words to kill."
Optional ARG sets number of words to kill."
(interactive "p")
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?_ "_" table)
(with-syntax-table table
(backward-kill-word arg))))
(verilog-ext-with-syntax-table-underscore-symbol
(backward-kill-word arg)))
((eq major-mode 'verilog-ts-mode)
(backward-kill-word arg))
(t
Expand All @@ -819,10 +846,8 @@ table.
Pass the args START, END and optional COLUMN to `indent-region'."
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?` "w" table)
(with-syntax-table table
(indent-region start end column))))
(verilog-ext-with-syntax-table-tick-word
(indent-region start end column)))
((eq major-mode 'verilog-ts-mode)
(indent-region start end column))
(t
Expand All @@ -838,10 +863,8 @@ directives with a modified syntax table.
If on a `verilog-ts-mode' buffer, run `indent-for-tab-command' with ARG."
(interactive "P")
(cond ((eq major-mode 'verilog-mode)
(let ((table (make-syntax-table verilog-mode-syntax-table)))
(modify-syntax-entry ?` "w" table)
(with-syntax-table table
(electric-verilog-tab))))
(verilog-ext-with-syntax-table-tick-word
(electric-verilog-tab)))
((eq major-mode 'verilog-ts-mode)
(indent-for-tab-command arg))
(t
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