CUDA: Implemented row flattening for non-glm RoPE

[JohannesGaessler]

This PR adds support for flattening tensors for the non-glm CUDA RoPE implementation. This reduces the associated kernel launch overhead by a factor of 512 for prompt processing. There is no difference for token generation:

GPU	Model	Test	t/s master	t/s PR	Speedup
RTX 3090	7b q4_0	pp	1347	1550	1.15
RTX 3090	13b q4_0	pp	773	851	1.1
RTX 3090	33b q4_0	pp	325	344	1.06
RTX 3090	7b q4_0	tg128	131.66	130.78	0.99
RTX 3090	13b q4_0	tg128	73.50	73.14	1
RTX 3090	33b q4_0	tg128	33.25	33.10	1
P40	7b q4_0	pp	624	665	1.07
P40	13b q4_0	pp	348	364	1.05
P40	33b q4_0	pp	148	150	1.01
P40	7b q4_0	tg128	50.54	50.62	1
P40	13b q4_0	tg128	27.89	27.84	1
P40	33b q4_0	tg128	12.08	12.07	1

[slaren]

Seems to improve performance under WSL even more, from 0.48 seconds per pass to 0.36 seconds per pass.