Fix materials

materials/complete/traffic-generator.py

@@ -1,25 +1,27 @@
 from gem5.components.boards.test_board import TestBoard
-from gem5.components.memory.single_channel import SingleChannelDDR_1600
+from gem5.components.memory import SingleChannelDDR3_1600
 from gem5.components.processors.random_generator import RandomGenerator
+from gem5.components.cachehierarchies.classic.no_cache import NoCache
 
 import m5
 from m5.objects import Root
 
-# Obtain the compinents
-mem_size = "1GiB"
-memory = SingleChannelDDR_1600(mem_size)
+# Setup the components.
+memory = SingleChannelDDR3_1600("1GiB")
 generator = RandomGenerator(
     duration="250us",
     rate="40GB/s",
     num_cores=1,
-    max_addr=mem_size,
+    max_addr=memory.get_size(),
 )
+cache_hierarchy = NoCache()
 
 # Add them to the Test board.
 board = TestBoard(
     clk_freq="3GHz",
     generator=generator,
     memory=memory,
+    cache_hierarchy=cache_hierarchy,
 )
 
 # Setup the root and instantiate the simulation.
@@ -29,5 +31,5 @@
 m5.instantiate()
 
 # Start the traffic generator.
-board.start_traffic()
+generator.start_traffic()
 exit_event = m5.simulate()

materials/obtain-resources.py

@@ -0,0 +1,5 @@
+from gem5.resources.resource import obtain_resource
+
+resource = obtain_resource("riscv-disk-img")
+
+print(f"The resource is available at {resource.get_local_path()}")

materials/traffic-generator.py

@@ -1,6 +1,7 @@
 from gem5.components.boards.test_board import TestBoard
 from gem5.components.memory.single_channel import SingleChannelDDR_1600
 from gem5.components.processors.random_generator import RandomGenerator
+from gem5.components.cachehierarchies.classic.no_cache import NoCache
 
 import m5
 from m5.objects import Root
@@ -14,5 +15,5 @@
 m5.instantiate()
 
 # Start the traffic generator.
-board.start_traffic()
+generator.start_traffic()
 exit_event = m5.simulate()