set some memory allocations to uncached for bcm2711

arch/arm64/mm/ioremap.c

@@ -87,7 +87,7 @@ void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size)
 	if (pfn_is_map_memory(__phys_to_pfn(phys_addr)))
 		return (void __iomem *)__phys_to_virt(phys_addr);
 
-	return __ioremap_caller(phys_addr, size, __pgprot(PROT_DEVICE_nGnRE),
+	return __ioremap_caller(phys_addr, size, __pgprot(PROT_NORMAL),
 				__builtin_return_address(0));
 }
 EXPORT_SYMBOL(ioremap_cache);

drivers/gpu/drm/radeon/atom.c

@@ -729,8 +729,8 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
 			cjiffies = jiffies;
 			if (time_after(cjiffies, ctx->last_jump_jiffies)) {
 				cjiffies -= ctx->last_jump_jiffies;
-				if ((jiffies_to_msecs(cjiffies) > 30000)) {
-					DRM_ERROR("atombios stuck in loop for more than 30secs aborting\n");
+				if ((jiffies_to_msecs(cjiffies) > 5000)) {
+					DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
 					ctx->abort = true;
 				}
 			} else {

drivers/gpu/drm/radeon/evergreen.c

@@ -5029,7 +5029,6 @@ static int evergreen_startup(struct radeon_device *rdev)
 		if (r)
 			return r;
 	}
-
 	evergreen_gpu_init(rdev);
 
 	/* allocate rlc buffers */
@@ -5045,17 +5044,11 @@ static int evergreen_startup(struct radeon_device *rdev)
 		}
 	}
 
-	/* TODO: Dying after here currently. */
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
 	/* allocate wb buffer */
 	r = radeon_wb_init(rdev);
 	if (r)
 		return r;
 
-	/* TODO: Dying before here currently. */
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
 	r = radeon_fence_driver_start_ring(rdev, RADEON_RING_TYPE_GFX_INDEX);
 	if (r) {
 		dev_err(rdev->dev, "failed initializing CP fences (%d).\n", r);

drivers/gpu/drm/radeon/evergreen_dma.c

@@ -155,8 +155,6 @@ struct radeon_fence *evergreen_copy_dma(struct radeon_device *rdev,
 	radeon_ring_unlock_commit(rdev, ring, false);
 	radeon_sync_free(rdev, &sync, fence);
 
-	r600_dma_ring_test(rdev, ring);
-
 	return fence;
 }
 

drivers/gpu/drm/radeon/r600.c

@@ -2625,7 +2625,6 @@ u32 r600_gfx_get_rptr(struct radeon_device *rdev,
 	else
 		rptr = RREG32(R600_CP_RB_RPTR);
 
-	mb(); //CHANGED
 	return rptr;
 }
 
@@ -3484,7 +3483,7 @@ int r600_ih_ring_alloc(struct radeon_device *rdev)
 	if (rdev->ih.ring_obj == NULL) {
 		r = radeon_bo_create(rdev, rdev->ih.ring_size,
 				     PAGE_SIZE, true,
-				     RADEON_GEM_DOMAIN_VRAM, 0,
+				     RADEON_GEM_DOMAIN_GTT, 0,
 				     NULL, NULL, &rdev->ih.ring_obj);
 		if (r) {
 			DRM_ERROR("radeon: failed to create ih ring buffer (%d).\n", r);
@@ -3494,7 +3493,7 @@ int r600_ih_ring_alloc(struct radeon_device *rdev)
 		if (unlikely(r != 0))
 			return r;
 		r = radeon_bo_pin(rdev->ih.ring_obj,
-				  RADEON_GEM_DOMAIN_VRAM,
+				  RADEON_GEM_DOMAIN_GTT,
 				  &rdev->ih.gpu_addr);
 		if (r) {
 			radeon_bo_unreserve(rdev->ih.ring_obj);
@@ -4039,10 +4038,8 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
 {
 	u32 wptr, tmp;
 
-	if (rdev->wb.enabled) {
+	if (rdev->wb.enabled)
 		wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);
-		mb();
-	}
 	else
 		wptr = RREG32(IH_RB_WPTR);
 

drivers/gpu/drm/radeon/r600_dma.c

@@ -57,7 +57,6 @@ uint32_t r600_dma_get_rptr(struct radeon_device *rdev,
 	else
 		rptr = RREG32(DMA_RB_RPTR);
 
-	mb(); //CHANGED
 	return (rptr & 0x3fffc) >> 2;
 }
 
@@ -246,7 +245,6 @@ int r600_dma_ring_test(struct radeon_device *rdev,
 	tmp = 0xCAFEDEAD;
 	rdev->wb.wb[index/4] = cpu_to_le32(tmp);
 
-	mb(); //CHANGED
 	r = radeon_ring_lock(rdev, ring, 4);
 	if (r) {
 		DRM_ERROR("radeon: dma failed to lock ring %d (%d).\n", ring->idx, r);
@@ -260,7 +258,6 @@ int r600_dma_ring_test(struct radeon_device *rdev,
 
 	for (i = 0; i < rdev->usec_timeout; i++) {
 		tmp = le32_to_cpu(rdev->wb.wb[index/4]);
-		mb(); //CHANGED
 		if (tmp == 0xDEADBEEF)
 			break;
 		udelay(1);
@@ -382,7 +379,6 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
 	r = 0;
 	for (i = 0; i < rdev->usec_timeout; i++) {
 		tmp = le32_to_cpu(rdev->wb.wb[index/4]);
-		mb(); //CHANGED
 		if (tmp == 0xDEADBEEF)
 			break;
 		udelay(1);

drivers/gpu/drm/radeon/radeon.h

@@ -370,7 +370,6 @@ struct radeon_fence_driver {
 	atomic64_t			last_seq;
 	bool				initialized, delayed_irq;
 	struct delayed_work		lockup_work;
-	dma_addr_t			dma_addr;
 };
 
 struct radeon_fence {
@@ -669,8 +668,6 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
 		     dma_addr_t *dma_addr, uint32_t flags);
 
 
-void radeon_gart_sync_all_for_device(struct radeon_device *rdev);
-
 /*
  * GPU MC structures, functions & helpers
  */
@@ -2347,11 +2344,6 @@ struct radeon_atcs {
 typedef uint32_t (*radeon_rreg_t)(struct radeon_device*, uint32_t);
 typedef void (*radeon_wreg_t)(struct radeon_device*, uint32_t, uint32_t);
 
-struct moved_bos_entry{
-	struct radeon_bo* bo;
-	struct list_head list;
-};
-
 struct radeon_device {
 	struct device			*dev;
 	struct drm_device		*ddev;
@@ -2497,25 +2489,6 @@ struct radeon_device {
 	/* tracking pinned memory */
 	u64 vram_pin_size;
 	u64 gart_pin_size;
-	struct radeon_bo *rick;
-	uint64_t rick_gpu;
-	void *rick_cpu;
-	uint64_t fb_gpu;
-
-	// reading back shader code for debugging
-	struct radeon_bo* shader_read_bo;
-	uint64_t shader_read_gpu;
-	void* shader_read_cpu;
-
-	// needed because of weird stuff
-	int numFSuses;
-
-	// tracking moved BOs to move them back after CS execution
-	struct radeon_bo** moved_bos;	// array of pointers to the BOs that were moved
-	int nMovedBos;	// number of BOs moved (determines size of array)
-	struct mutex move_bos_mutex;
-	struct list_head move_bo_head;
-	bool trackMoves;	// enables or disables tracking of the BO moves to avoid tracking while moving the BOs back after CS execution
 };
 
 bool radeon_is_px(struct drm_device *dev);

drivers/gpu/drm/radeon/radeon_bios.c

@@ -81,7 +81,6 @@ static bool radeon_read_bios(struct radeon_device *rdev)
 {
 	uint8_t __iomem *bios, val1, val2;
 	size_t size;
-	int pos;
 
 	rdev->bios = NULL;
 	/* XXX: some cards may return 0 for rom size? ddx has a workaround */
@@ -102,11 +101,7 @@ static bool radeon_read_bios(struct radeon_device *rdev)
 		pci_unmap_rom(rdev->pdev, bios);
 		return false;
 	}
-	//memcpy_fromio(rdev->bios, bios, size);
-	for(pos = 0;pos < size; pos++){
-	  //memcpy_fromio(rdev->bios+pos,bios+pos,1);
-	  rdev->bios[pos] = __raw_readb(bios+pos);
-	}
+	memcpy_fromio_pcie(rdev->bios, bios, size);
 	pci_unmap_rom(rdev->pdev, bios);
 	return true;
 }

drivers/gpu/drm/radeon/radeon_cs.c

@@ -663,7 +663,6 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_cs_parser parser;
 	int r;
-	INIT_LIST_HEAD(&rdev->move_bo_head);
 
 	down_read(&rdev->exclusive_lock);
 	if (!rdev->accel_working) {
@@ -677,7 +676,6 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 			r = -EAGAIN;
 		return r;
 	}
-	rdev->trackMoves = true;
 	/* initialize parser */
 	memset(&parser, 0, sizeof(struct radeon_cs_parser));
 	parser.filp = filp;

drivers/gpu/drm/radeon/radeon_device.c

@@ -538,42 +538,6 @@ void radeon_wb_fini(struct radeon_device *rdev)
 	}
 }
 
-//memset_io with only 32-bit accesses
-void memset_io_pcie_wb(volatile void __iomem *dst, int c, size_t count)
-{
-	u32 qc = (u8)c;
-
-	qc |= qc << 8;
-	qc |= qc << 16;
-	//qc |= qc << 32;
-	mb();
-
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
-	while (count && !IS_ALIGNED((unsigned long)dst, 8)) {
-		__raw_writeb(c, dst);
-		dst++;
-		count--;
-	}
-
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
-	while (count >= 4) {
-		__raw_writel(qc, dst);
-		dst += 4;
-		count -= 4;
-	}
-
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
-	while (count) {
-		__raw_writeb(c, dst);
-		dst++;
-		count--;
-	}
-}
-
-
 /**
  * radeon_wb_init- Init Writeback driver info and allocate memory
  *
@@ -589,7 +553,7 @@ int radeon_wb_init(struct radeon_device *rdev)
 
 	if (rdev->wb.wb_obj == NULL) {
 		r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true,
-				     RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL,
+				     RADEON_GEM_DOMAIN_GTT, 0, NULL, NULL,
 				     &rdev->wb.wb_obj);
 		if (r) {
 			dev_warn(rdev->dev, "(%d) create WB bo failed\n", r);
@@ -600,7 +564,7 @@ int radeon_wb_init(struct radeon_device *rdev)
 			radeon_wb_fini(rdev);
 			return r;
 		}
-		r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_VRAM,
+		r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT,
 				&rdev->wb.gpu_addr);
 		if (r) {
 			radeon_bo_unreserve(rdev->wb.wb_obj);
@@ -617,46 +581,34 @@ int radeon_wb_init(struct radeon_device *rdev)
 		}
 	}
 
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
 	/* clear wb memory */
-	memset_io_pcie_wb((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE);
-
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
+	memset_io_pcie((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE);
 	/* disable event_write fences */
 	rdev->wb.use_event = false;
-
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
-
 	/* disabled via module param */
 	if (radeon_no_wb == 1) {
 		rdev->wb.enabled = false;
 	} else {
-		printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
 		if (rdev->flags & RADEON_IS_AGP) {
 			/* often unreliable on AGP */
 			rdev->wb.enabled = false;
 		} else if (rdev->family < CHIP_R300) {
 			/* often unreliable on pre-r300 */
 			rdev->wb.enabled = false;
 		} else {
-			printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
 			rdev->wb.enabled = true;
 			/* event_write fences are only available on r600+ */
 			if (rdev->family >= CHIP_R600) {
 				rdev->wb.use_event = true;
 			}
 		}
 	}
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
 	/* always use writeback/events on NI, APUs */
 	if (rdev->family >= CHIP_PALM) {
 		rdev->wb.enabled = true;
 		rdev->wb.use_event = true;
 	}
 
-	printk(KERN_ALERT "DEBUG: Passed %s %d \n",__FUNCTION__,__LINE__); msleep(200);
 	dev_info(rdev->dev, "WB %sabled\n", rdev->wb.enabled ? "en" : "dis");
 
 	return 0;
@@ -1641,9 +1593,6 @@ int radeon_device_init(struct radeon_device *rdev,
 		else
 			DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n");
 	}
-
-	mutex_init(&rdev->move_bos_mutex);
-
 	return 0;
 
 failed:

drivers/gpu/drm/radeon/radeon_fb.c

@@ -189,7 +189,7 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
 	/* Only 27 bit offset for legacy CRTC */
 	ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
 				       ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
-				       &rdev->fb_gpu);
+				       NULL);
 	if (ret) {
 		radeon_bo_unreserve(rbo);
 		goto out_unref;

drivers/gpu/drm/radeon/radeon_gart.c

@@ -320,23 +320,6 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
 	return 0;
 }
 
-/**
- * syncs all bound pages for the card (workaround for incoherent systems)
- *
- */
-void radeon_gart_sync_all_for_device(struct radeon_device *rdev){
-	int i;
-	printk("syncing all GART pages for device\n");
-	for (i = 0; i < rdev->gart.num_gpu_pages; i++){    // loop over all gpu pages
-        	if(rdev->gart.pages_entry[i] == rdev->dummy_page.entry){
-        		continue;    // entry is just the dummy page, so it can be ignored
-        	}
-        	dma_sync_single_for_device(rdev->dev, rdev->gart.pages_entry[i] & 0xFFFFFFFFFFFFF000ULL, 4096, DMA_BIDIRECTIONAL);
-        	dma_sync_single_for_cpu(rdev->dev, rdev->gart.pages_entry[i] & 0xFFFFFFFFFFFFF000ULL, 4096, DMA_BIDIRECTIONAL);
-	}
-
-}
-
 /**
  * radeon_gart_init - init the driver info for managing the gart
  *