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ia64: Use generic pci_mmap_resource_range()
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Now that we eliminated the different behaviour in separately-reviewable
commits, we can switch IA64 to the generic implementation.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Tested-by: Tony Luck <tony.luck@intel.com>
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dwmw2 authored and bjorn-helgaas committed Apr 20, 2017
1 parent fcdb10d commit d9c102d
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Showing 2 changed files with 1 addition and 30 deletions.
1 change: 1 addition & 0 deletions arch/ia64/include/asm/pci.h
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,7 @@ extern unsigned long ia64_max_iommu_merge_mask;
#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)

#define HAVE_PCI_MMAP
#define ARCH_GENERIC_PCI_MMAP_RESOURCE
#define arch_can_pci_mmap_wc() 1

#define HAVE_PCI_LEGACY
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30 changes: 0 additions & 30 deletions arch/ia64/pci/pci.c
Original file line number Diff line number Diff line change
Expand Up @@ -418,36 +418,6 @@ pcibios_align_resource (void *data, const struct resource *res,
return res->start;
}

int
pci_mmap_page_range (struct pci_dev *dev, int bar,
struct vm_area_struct *vma,
enum pci_mmap_state mmap_state, int write_combine)
{
/*
* I/O space cannot be accessed via normal processor loads and
* stores on this platform.
*/
if (mmap_state == pci_mmap_io)
/*
* XXX we could relax this for I/O spaces for which ACPI
* indicates that the space is 1-to-1 mapped. But at the
* moment, we don't support multiple PCI address spaces and
* the legacy I/O space is not 1-to-1 mapped, so this is moot.
*/
return -EINVAL;

if (write_combine)
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
else
vma->vm_page_prot = pgprot_device(vma->vm_page_prot);

if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
vma->vm_end - vma->vm_start, vma->vm_page_prot))
return -EAGAIN;

return 0;
}

/**
* ia64_pci_get_legacy_mem - generic legacy mem routine
* @bus: bus to get legacy memory base address for
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