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Commits on Jan 29, 2020

• target/mips: Add implementation of GINVT instruction

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• target/mips: Amend CP0 WatchHi register implementation

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Commits on Jan 24, 2019

• target/mips: Add I6500 core configuration

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Commits on Jan 18, 2019

• target/mips: Update ITU to handle bus errors

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• target/mips: Update ITU to utilize SAARI and SAAR CP0 registers

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• target/mips: Add field and R/W access to ITU control register ICR0

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• target/mips: Provide R/W access to SAARI and SAAR CP0 registers

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• target/mips: Add fields for SAARI and SAAR CP0 registers

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Commits on Oct 18, 2018

• target/mips: Implement hardware page table walker for MIPS32

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• target/mips: Add reset state for PWSize and PWField registers

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• target/mips: Add CP0 PWCtl register

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• target/mips: Add CP0 PWSize register

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• target/mips: Add CP0 PWField register

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• target/mips: Add CP0 PWBase register

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Commits on Aug 24, 2018

• target/mips: Fix ERET/ERETNC behavior related to ADEL exception

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• target/mips: Add emulation of nanoMIPS 32-bit load and store instructions

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• target/mips: Add emulation of misc nanoMIPS instructions (p_lsx)

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• target/mips: Add emulation of misc nanoMIPS instructions (pool32axf)

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• target/mips: Add emulation of misc nanoMIPS instructions (pool32a0)

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• target/mips: Add emulation of nanoMIPS FP instructions

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• target/mips: Add emulation of nanoMIPS 48-bit instructions

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• target/mips: Add emulation of nanoMIPS instructions MOVE.P and MOVE.PREV

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• target/mips: Add emulation of some common nanoMIPS 32-bit instructions

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• target/mips: Add emulation of nanoMIPS 16-bit logic instructions

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• target/mips: Add emulation of nanoMIPS 16-bit load and store instructions

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• target/mips: Add emulation of nanoMIPS 16-bit misc instructions

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• target/mips: Add emulation of nanoMIPS 16-bit shift instructions

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• target/mips: Add emulation of nanoMIPS 16-bit arithmetic instructions

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• target/mips: Add nanoMIPS base instruction set opcodes

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Commits on Aug 16, 2018

• target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0

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• target/mips: Don't update BadVAddr register in Debug Mode

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Commits on Jun 27, 2018

• target/mips: Fix gdbstub to read/write 64 bit FP registers

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• target/mips: Fix data type for offset

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• target/mips: Update gen_flt_ldst()

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• target/mips: Fix microMIPS on reset

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