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Backport fix max voltage (BPI R2) #107

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Backport fix max voltage (BPI R2) #107

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782f473
cpufreq: mediatek: fix passing zero to 'PTR_ERR'
jiaweichang-mtk Mar 24, 2023
c455075
cpufreq: mediatek: fix KP caused by handler usage after regulator_put…
jiaweichang-mtk Mar 24, 2023
ec5e195
cpufreq: mediatek: raise proc/sram max voltage for MT8516
jiaweichang-mtk Mar 24, 2023
8399ddf
cpufreq: mediatek: Raise proc and sram max voltage for MT7622/7623
Mar 24, 2023
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98 changes: 57 additions & 41 deletions drivers/cpufreq/mediatek-cpufreq.c
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Original file line number Diff line number Diff line change
Expand Up @@ -373,13 +373,13 @@ static struct device *of_get_cci(struct device *cpu_dev)
struct platform_device *pdev;

np = of_parse_phandle(cpu_dev->of_node, "mediatek,cci", 0);
if (IS_ERR_OR_NULL(np))
return NULL;
if (!np)
return ERR_PTR(-ENODEV);

pdev = of_find_device_by_node(np);
of_node_put(np);
if (IS_ERR_OR_NULL(pdev))
return NULL;
if (!pdev)
return ERR_PTR(-ENODEV);

return &pdev->dev;
}
Expand All @@ -401,7 +401,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
info->ccifreq_bound = false;
if (info->soc_data->ccifreq_supported) {
info->cci_dev = of_get_cci(info->cpu_dev);
if (IS_ERR_OR_NULL(info->cci_dev)) {
if (IS_ERR(info->cci_dev)) {
ret = PTR_ERR(info->cci_dev);
dev_err(cpu_dev, "cpu%d: failed to get cci device\n", cpu);
return -ENODEV;
Expand All @@ -420,36 +420,36 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
ret = PTR_ERR(info->inter_clk);
dev_err_probe(cpu_dev, ret,
"cpu%d: failed to get intermediate clk\n", cpu);
goto out_free_resources;
goto out_free_mux_clock;
}

info->proc_reg = regulator_get_optional(cpu_dev, "proc");
if (IS_ERR(info->proc_reg)) {
ret = PTR_ERR(info->proc_reg);
dev_err_probe(cpu_dev, ret,
"cpu%d: failed to get proc regulator\n", cpu);
goto out_free_resources;
goto out_free_inter_clock;
}

ret = regulator_enable(info->proc_reg);
if (ret) {
dev_warn(cpu_dev, "cpu%d: failed to enable vproc\n", cpu);
goto out_free_resources;
goto out_free_proc_reg;
}

/* Both presence and absence of sram regulator are valid cases. */
info->sram_reg = regulator_get_optional(cpu_dev, "sram");
if (IS_ERR(info->sram_reg)) {
ret = PTR_ERR(info->sram_reg);
if (ret == -EPROBE_DEFER)
goto out_free_resources;
goto out_disable_proc_reg;

info->sram_reg = NULL;
} else {
ret = regulator_enable(info->sram_reg);
if (ret) {
dev_warn(cpu_dev, "cpu%d: failed to enable vsram\n", cpu);
goto out_free_resources;
goto out_free_sram_reg;
}
}

Expand All @@ -458,13 +458,13 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
if (ret) {
dev_err(cpu_dev,
"cpu%d: failed to get OPP-sharing information\n", cpu);
goto out_free_resources;
goto out_disable_sram_reg;
}

ret = dev_pm_opp_of_cpumask_add_table(&info->cpus);
if (ret) {
dev_warn(cpu_dev, "cpu%d: no OPP table\n", cpu);
goto out_free_resources;
goto out_disable_sram_reg;
}

ret = clk_prepare_enable(info->cpu_clk);
Expand Down Expand Up @@ -533,43 +533,41 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
out_free_opp_table:
dev_pm_opp_of_cpumask_remove_table(&info->cpus);

out_free_resources:
if (regulator_is_enabled(info->proc_reg))
regulator_disable(info->proc_reg);
if (info->sram_reg && regulator_is_enabled(info->sram_reg))
out_disable_sram_reg:
if (info->sram_reg)
regulator_disable(info->sram_reg);

if (!IS_ERR(info->proc_reg))
regulator_put(info->proc_reg);
if (!IS_ERR(info->sram_reg))
out_free_sram_reg:
if (info->sram_reg)
regulator_put(info->sram_reg);
if (!IS_ERR(info->cpu_clk))
clk_put(info->cpu_clk);
if (!IS_ERR(info->inter_clk))
clk_put(info->inter_clk);

out_disable_proc_reg:
regulator_disable(info->proc_reg);

out_free_proc_reg:
regulator_put(info->proc_reg);

out_free_inter_clock:
clk_put(info->inter_clk);

out_free_mux_clock:
clk_put(info->cpu_clk);

return ret;
}

static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info)
{
if (!IS_ERR(info->proc_reg)) {
regulator_disable(info->proc_reg);
regulator_put(info->proc_reg);
}
if (!IS_ERR(info->sram_reg)) {
regulator_disable(info->proc_reg);
regulator_put(info->proc_reg);
if (info->sram_reg) {
regulator_disable(info->sram_reg);
regulator_put(info->sram_reg);
}
if (!IS_ERR(info->cpu_clk)) {
clk_disable_unprepare(info->cpu_clk);
clk_put(info->cpu_clk);
}
if (!IS_ERR(info->inter_clk)) {
clk_disable_unprepare(info->inter_clk);
clk_put(info->inter_clk);
}

clk_disable_unprepare(info->cpu_clk);
clk_put(info->cpu_clk);
clk_disable_unprepare(info->inter_clk);
clk_put(info->inter_clk);
dev_pm_opp_of_cpumask_remove_table(&info->cpus);
dev_pm_opp_unregister_notifier(info->cpu_dev, &info->opp_nb);
}
Expand Down Expand Up @@ -695,6 +693,15 @@ static const struct mtk_cpufreq_platform_data mt2701_platform_data = {
.ccifreq_supported = false,
};

static const struct mtk_cpufreq_platform_data mt7622_platform_data = {
.min_volt_shift = 100000,
.max_volt_shift = 200000,
.proc_max_volt = 1360000,
.sram_min_volt = 0,
.sram_max_volt = 1360000,
.ccifreq_supported = false,
};

static const struct mtk_cpufreq_platform_data mt8183_platform_data = {
.min_volt_shift = 100000,
.max_volt_shift = 200000,
Expand All @@ -713,20 +720,29 @@ static const struct mtk_cpufreq_platform_data mt8186_platform_data = {
.ccifreq_supported = true,
};

static const struct mtk_cpufreq_platform_data mt8516_platform_data = {
.min_volt_shift = 100000,
.max_volt_shift = 200000,
.proc_max_volt = 1310000,
.sram_min_volt = 0,
.sram_max_volt = 1310000,
.ccifreq_supported = false,
};

/* List of machines supported by this driver */
static const struct of_device_id mtk_cpufreq_machines[] __initconst = {
{ .compatible = "mediatek,mt2701", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt2712", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt7622", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt7623", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8167", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt7622", .data = &mt7622_platform_data },
{ .compatible = "mediatek,mt7623", .data = &mt7622_platform_data },
{ .compatible = "mediatek,mt8167", .data = &mt8516_platform_data },
{ .compatible = "mediatek,mt817x", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8173", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8176", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8183", .data = &mt8183_platform_data },
{ .compatible = "mediatek,mt8186", .data = &mt8186_platform_data },
{ .compatible = "mediatek,mt8365", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8516", .data = &mt2701_platform_data },
{ .compatible = "mediatek,mt8516", .data = &mt8516_platform_data },
{ }
};
MODULE_DEVICE_TABLE(of, mtk_cpufreq_machines);
Expand Down