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Only check for successful vectorization on wider_reduce_into_iter
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Different vectorization results are due to different LLVM versions.
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DianQK committed Sep 24, 2023
1 parent d30f210 commit 910674f
Showing 1 changed file with 1 addition and 3 deletions.
4 changes: 1 addition & 3 deletions tests/codegen/simd/simd-wide-sum.rs
Original file line number Diff line number Diff line change
Expand Up @@ -52,8 +52,6 @@ pub fn wider_reduce_iter(x: Simd<u8, N>) -> u16 {
#[no_mangle]
// CHECK-LABEL: @wider_reduce_into_iter
pub fn wider_reduce_into_iter(x: Simd<u8, N>) -> u16 {
// CHECK: zext <16 x i8>
// CHECK-SAME: to <16 x i16>
// CHECK: call i16 @llvm.vector.reduce.add.v16i16(<16 x i16>
// CHECK: call i16 @llvm.vector.reduce.add
x.to_array().into_iter().map(u16::from).sum()
}

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