Problems with Skylake support: missing hbwmalloc.h header

[mmrmo]

Thanks for the beautiful work. I have have however a problem in compiling it, if I try to specifically enable Intel Skylake optimizations, in attempt to replicate the comparison against MKL from: Intel simple SGEMM/DGEMM benchmark

./configure --enable-threading=openmp skx

./configure skx make clean ; make V=1

... fails, due to not finding the header hbwmalloc.h (from memkind, I understand?)

make V=1
./build/flatten-headers.py -c -v1 ./frame/include/blis.h include/skx/blis.h "./include" "./ ./config/skx/ ./kernels/skx/ ./kernels/skx/3/ ./frame/0/ ./frame/0/copysc/ ./frame/1/ ./frame/1d/ ./frame/1f/ ./frame/1m/ ./frame/1m/packm/ ./frame/1m/scalm/ ./frame/1m/unpackm/ ./frame/2/ ./frame/2/gemv/ ./frame/2/ger/ ./frame/2/hemv/ ./frame/2/her/ ./frame/2/her2/ ./frame/2/symv/ ./frame/2/syr/ ./frame/2/syr2/ ./frame/2/trmv/ ./frame/2/trsv/ ./frame/3/ ./frame/3/gemm/ ./frame/3/hemm/ ./frame/3/her2k/ ./frame/3/herk/ ./frame/3/symm/ ./frame/3/syr2k/ ./frame/3/syrk/ ./frame/3/trmm/ ./frame/3/trmm3/ ./frame/3/trsm/ ./frame/base/ ./frame/base/check/ ./frame/base/noopt/ ./frame/compat/ ./frame/compat/cblas/ ./frame/compat/cblas/f77_sub/ ./frame/compat/cblas/src/ ./frame/compat/check/ ./frame/compat/f2c/ ./frame/compat/f2c/util/ ./frame/include/ ./frame/include/level0/ ./frame/include/level0/1e/ ./frame/include/level0/1m/ ./frame/include/level0/1r/ ./frame/include/level0/io/ ./frame/include/level0/ri/ ./frame/include/level0/ri3/ ./frame/include/level0/rih/ ./frame/include/level0/ro/ ./frame/include/level0/rpi/ ./frame/ind/ ./frame/ind/cntx/ ./frame/ind/misc/ ./frame/ind/oapi/ ./frame/ind/tapi/ ./frame/ind/ukernels/ ./frame/thread/ ./frame/util/"
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gcc -O3 -mavx512f -mavx512dq -mavx512bw -mavx512vl -mfpmath=sse -march=skylake-avx512 -Wall -Wno-unused-function -Wfatal-errors -fPIC -std=c99 -D_POSIX_C_SOURCE=200112L -fopenmp -I./include/skx -I./frame/3/ -I./frame/ind/ukernels/ -I./frame/1m/ -I./frame/1f/ -I./frame/1/ -I./frame/include -DBLIS_VERSION_STRING=\"0.2.2-137\" -c config/skx/bli_cntx_init_skx.c -o obj/skx/config/skx/bli_cntx_init_skx.o
In file included from config/skx/bli_cntx_init_skx.c:35:0:
./include/skx/blis.h:16156:34: fatal error: hbwmalloc.h: No such file or directory
 #include <hbwmalloc.h> // skipped
                                  ^
compilation terminated.
Makefile:452: recipe for target 'obj/skx/config/skx/bli_cntx_init_skx.o' failed
make: *** [obj/skx/config/skx/bli_cntx_init_skx.o] Error 1

Could you please indicate this dependence in future revisions of 'configure' ?

Thanks!

[devinamatthews]

This should be fixed in f7df64d when it is merged. Note that this configuration is tuned for parts with 2 VPUs.

[mmrmo]

Thank you very much, indeed now compilation works. However I've realized that 'skx: skx' from the list 'config_registry' refers in this project to an extended version of Skylake, i.e. the one that GCC ver. 6.3.0 manpage would target as '-march=skylake-avx512'. The machine I've been trying the library on is instead a plain 'Skylake', which does not support in fact the AVX512?? new instructions / does not have the corresponding extra registers: I was a bit misled by the documentation, I'd suggest indicating that there are indeed two different targets within this 6th generation Core CPU family, in terms of supported ISA. Thanks again for the nice work! Best, -- Alberto.

…

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[jeffhammond]

However I've realized that 'skx: skx' from the list 'config_registry' refers in this project to an extended version of Skylake, i.e. the one that GCC ver. 6.3.0 manpage would target as '-march=skylake-avx512'. The machine I've been trying the library on is instead a plain 'Skylake', which does not support in fact the AVX512?? new instructions / does not have the corresponding extra registers: I was a bit misled by the documentation, I'd suggest indicating that there are indeed two different targets within this 6th generation Core CPU family, in terms of supported ISA.

BLIS relies on the Intel acronyms SKX, which may not be obvious to the uninitiated. SKX = Skylake Xeon, which supports AVX-512. SKL = Skylake, which supports AVX2. For BLIS purposes, treat SKL like HSW (Haswell). Sorry these distinctions are not clear. It is an unfortunate situation.

--

Jeff Hammond jeff.science@gmail.com http://jeffhammond.github.io/

[devinamatthews]

@fgvanzee maybe we could add aliases for missing architectures that don't have their own kernels: ivybridge, broadwell, skylake etc. Maybe also add skylake-x : skx...

[fgvanzee]

@devinamatthews Creating these aliases wouldn't be too much work. That said, I can't help but notice that the only people the missing aliases might confuse are those who are configuring with explicit configuration targets. (Running ./configure auto will automatically select haswell on a Broadwell system, for example.) I thought we were the only ones who spelled out our configurations? :) But perhaps the overly cautious and curious users who try to understand what's going on before they execute anything might also get confused, stumbling upon config_registry and not finding their un-aliased microarchitecture listed, which might lead them to think that their system is unsupported.

On a side note, it's unfortunate there isn't a mechanism in my recently-rewritten configuration system that allows for these aliases without duplicating the contents of, for example, the make_defs.mk file of the "base" configuration. In that file, everything would remain the same between the aliased and base configurations except for the line that specifies the configuration name.