Deprecate ShrinkWrapping - Part I

This is the first PR which effectively removes all the ShrinkWrapping code from OMR. The code is removed in such a way that it is easy to see all the coupled parts across the optimizer, codegens, and control.

The optimization currently depends on some cleanup in the downstream OpenJ9 project which has dependencies on this optimizaiton. There will be a subsequent "Part II" PR which will remove some of the shell files so as to not cause build breaks.

Issue: eclipse-omr#2107

Signed-off-by: Filip Jeremic <fjeremic@ca.ibm.com>

compiler/codegen/OMRCodeGenPhase.cpp

@@ -662,14 +662,6 @@ OMR::CodeGenPhase::performRemoveUnusedLocalsPhase(TR::CodeGenerator * cg, TR::Co
    cg->removeUnusedLocals();
    }
 
-void
-OMR::CodeGenPhase::performShrinkWrappingPhase(TR::CodeGenerator * cg, TR::CodeGenPhase * phase)
-   {
-   TR::Compilation *comp = cg->comp();
-   if (comp->getOptimizer())
-      comp->getOptimizer()->performVeryLateOpts();
-   }
-
 void
 OMR::CodeGenPhase::performInsertDebugCountersPhase(TR::CodeGenerator * cg, TR::CodeGenPhase * phase)
    {
@@ -717,8 +709,6 @@ OMR::CodeGenPhase::getName(PhaseValue phase)
 	 return "FindAndFixCommonedReferencesPhase";
       case RemoveUnusedLocalsPhase:
 	 return "RemoveUnusedLocalsPhase";
-      case ShrinkWrappingPhase:
-	 return "ShrinkWrappingPhase";
       case InliningReportPhase:
 	 return "InliningReportPhase";
       case InsertDebugCountersPhase:

compiler/codegen/OMRCodeGenPhase.hpp

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2000, 2016 IBM Corp. and others
+ * Copyright (c) 2000, 2018 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -96,7 +96,6 @@ class OMR_EXTENSIBLE CodeGenPhase
    static void performInliningReportPhase(TR::CodeGenerator * cg, TR::CodeGenPhase *);
    static void performFindAndFixCommonedReferencesPhase(TR::CodeGenerator * cg, TR::CodeGenPhase *);
    static void performRemoveUnusedLocalsPhase(TR::CodeGenerator * cg, TR::CodeGenPhase *);
-   static void performShrinkWrappingPhase(TR::CodeGenerator * cg, TR::CodeGenPhase *);
    static void performCleanUpFlagsPhase(TR::CodeGenerator * cg, TR::CodeGenPhase * phase);
    static void performInsertDebugCountersPhase(TR::CodeGenerator * cg, TR::CodeGenPhase * phase);
 

compiler/codegen/OMRCodeGenPhaseEnum.hpp

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2000, 2016 IBM Corp. and others
+ * Copyright (c) 2000, 2018 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -39,7 +39,6 @@
       ProcessRelocationsPhase,
       FindAndFixCommonedReferencesPhase,
       RemoveUnusedLocalsPhase,
-      ShrinkWrappingPhase, // all
       InliningReportPhase, // all
       InsertDebugCountersPhase,
       CleanUpFlagsPhase,

compiler/codegen/OMRCodeGenPhaseFunctionTable.hpp

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2000, 2016 IBM Corp. and others
+ * Copyright (c) 2000, 2018 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -39,7 +39,6 @@
    TR::CodeGenPhase::performProcessRelocationsPhase,                                         //ProcessRelocationsPhase
    TR::CodeGenPhase::performFindAndFixCommonedReferencesPhase,                               //FindAndFixCommonedReferencesPhase
    TR::CodeGenPhase::performRemoveUnusedLocalsPhase,                                         //RemoveUnusedLocalsPhase
-   TR::CodeGenPhase::performShrinkWrappingPhase,                                             //ShrinkWrappingPhase
    TR::CodeGenPhase::performInliningReportPhase,                                             //InliningReportPhase
    TR::CodeGenPhase::performInsertDebugCountersPhase,
    TR::CodeGenPhase::performCleanUpFlagsPhase,

compiler/codegen/OMRCodeGenerator.cpp

@@ -251,13 +251,11 @@ OMR::CodeGenerator::CodeGenerator() :
      _staticRelocationList(_compilation->allocator()),
      _breakPointList(getTypedAllocator<uint8_t*>(TR::comp()->allocator())),
      _jniCallSites(getTypedAllocator<TR_Pair<TR_ResolvedMethod,TR::Instruction> *>(TR::comp()->allocator())),
-     _lowestSavedReg(0),
      _preJitMethodEntrySize(0),
      _jitMethodEntryPaddingSize(0),
      _lastInstructionBeforeCurrentEvaluationTreeTop(NULL),
      _unlatchedRegisterList(NULL),
      _indentation(2),
-     _preservedRegsInPrologue(NULL),
      _currentBlock(NULL),
      _realVMThreadRegister(NULL),
      _internalControlFlowNestingDepth(0),
@@ -2681,99 +2679,6 @@ OMR::CodeGenerator::sizeOfInstructionToBePatchedHCRGuard(TR::Instruction *vgdnop
    return accumulatedSize;
    }
 
-
-TR::Instruction *
-OMR::CodeGenerator::saveOrRestoreRegisters(TR_BitVector *regs, TR::Instruction *cursor, bool doSaves)
-   {
-   // use store/load multiple to save or restore registers
-   // in the prologue/epilogue on platforms that support store/load
-   // multiple instructions (e.g. ppc32 and z)
-   //
-
-   // the registers need to be in sequence
-   //
-   int32_t startIdx = -1;
-   int32_t endIdx = -1;
-   int32_t prevIdx = -1;
-   int32_t i = 0;
-   int32_t numRegs = regs->elementCount();
-   traceMsg(self()->comp(), "numRegs %d at cursor %p\n", numRegs, cursor);
-
-   int32_t savedRegs = 0;
-   TR_BitVectorIterator resIt(*regs);
-   while (resIt.hasMoreElements())
-      {
-      int32_t curIdx = resIt.getNextElement();
-      if (prevIdx != -1)
-         {
-         if (curIdx == prevIdx+1)
-            {
-            if (startIdx == -1) startIdx = prevIdx; // new pattern
-            endIdx = curIdx;
-            }
-         else
-            {
-            // pattern broken, so insert a load/store multiple
-            // for the regs upto this point
-            //
-            if (i > 1)
-               {
-               // insert store/load multiple
-               //
-               traceMsg(self()->comp(), "found pattern for start %d end %d at cursor %p\n", startIdx, endIdx, cursor);
-               cursor = self()->getLinkage()->composeSavesRestores(cursor, startIdx, endIdx, -1 /*_mapRegsToStack[startIdx]*/, numRegs, doSaves);
-               savedRegs += i;
-               }
-            else
-               {
-               // insert a single store/load for prevIdx
-               //
-               traceMsg(self()->comp(), "pattern broken idx %d at cursor %p doSaves %d\n", prevIdx, cursor, doSaves);
-               if (doSaves)
-                  cursor = self()->getLinkage()->savePreservedRegister(cursor, prevIdx, -1);
-               else
-                  cursor =self()->getLinkage()->restorePreservedRegister(cursor, prevIdx, -1);
-               savedRegs++;
-               }
-            startIdx = -1;
-            endIdx = -1;
-            i = 0;
-            }
-        }
-      else
-         startIdx = curIdx;
-      i++;
-      prevIdx = curIdx;
-      }
-
-   traceMsg(self()->comp(), "savedRegs %d at cursor %p startIdx %d endIdx %d\n", savedRegs, cursor, startIdx, endIdx);
-   // do the remaining
-   if ((numRegs > 1) &&
-         (startIdx != -1))
-      {
-      // compose save restores
-      cursor = self()->getLinkage()->composeSavesRestores(cursor, startIdx, endIdx, -1 /*_mapRegsToStack[startIdx]*/, numRegs, doSaves);
-      savedRegs += (endIdx - startIdx + 1);
-      }
-
-   if (savedRegs != numRegs)
-      {
-      resIt.setBitVector(*regs);
-      for (; savedRegs; --savedRegs) resIt.getNextElement();
-      while (resIt.hasMoreElements())
-         {
-         int32_t curIdx = resIt.getNextElement();
-         // insert a single store for curIdx
-         //
-         if (doSaves)
-            cursor = self()->getLinkage()->savePreservedRegister(cursor, curIdx, -1);
-         else
-            cursor = self()->getLinkage()->restorePreservedRegister(cursor, curIdx, -1);
-         }
-      }
-   return cursor;
-   }
-
 #ifdef DEBUG
 
 void

compiler/codegen/OMRCodeGenerator.hpp

@@ -734,29 +734,6 @@ class OMR_EXTENSIBLE CodeGenerator
    // IA32 only?
    uint32_t getRegisterMapInfoBitsMask() {return 0;} // no virt, cast
 
-   // --------------------------------------------------------------------------
-   // Shrink wrapping
-   //
-   TR_BitVector *getPreservedRegsInPrologue() {return _preservedRegsInPrologue;}
-   TR_BitVector *setPreservedRegsInPrologue(TR_BitVector *v) {return (_preservedRegsInPrologue = v);}
-
-   int32_t getLowestSavedRegister() {return _lowestSavedReg;}
-   void setLowestSavedRegister(int32_t v) {_lowestSavedReg = v;}
-
-   bool processInstruction(TR::Instruction *instr, TR_BitVector **registerUsageInfo, int32_t &blockNum, int32_t &isFence, bool traceIt) {return false;} // no virt, cast
-   uint32_t isPreservedRegister(int32_t regIndex) { return 0; } // no virt, cast
-   bool isReturnInstruction(TR::Instruction *instr) { return false; } // no virt, cast
-   bool isBranchInstruction(TR::Instruction *instr) { return false; } // no virt, cast
-   int32_t isFenceInstruction(TR::Instruction *instr) { return false; } // no virt
-   bool isAlignmentInstruction(TR::Instruction *instr) { return false; } // no virt
-   bool isLabelInstruction(TR::Instruction *instr) { return false; } // no virt
-   TR::Instruction *splitEdge(TR::Instruction *cursor, bool isFallThrough, bool needsJump, TR::Instruction *newSplitLabel, TR::list<TR::Instruction*> *jmpInstrs, bool firstJump = false) { return NULL; } // no virt
-   TR::Instruction *splitBlockEntry(TR::Instruction *instr) { return NULL; } // no virt
-   int32_t computeRegisterSaveDescription(TR_BitVector *regs, bool populateInfo = false) { return 0; } // no virt
-   void processIncomingParameterUsage(TR_BitVector **registerUsageInfo, int32_t blockNum) { return; } // no virt
-   void updateSnippetMapWithRSD(TR::Instruction *cur, int32_t rsd) { return; } // no virt
-   bool isTargetSnippetOrOutOfLine(TR::Instruction *instr, TR::Instruction **start, TR::Instruction **end) { return false; }
-
    // --------------------------------------------------------------------------
    // Method frame building
    //
@@ -1393,9 +1370,7 @@ class OMR_EXTENSIBLE CodeGenerator
 
    // IA32 only?
    int32_t arrayInitMinimumNumberOfBytes() {return 8;} // no virt
-
-   TR::Instruction *saveOrRestoreRegisters(TR_BitVector *regs, TR::Instruction *cursor, bool doSaves);
-
+
    void addCountersToEdges(TR::Block *block);
 
    bool getSupportsBitOpCodes() {return false;} // no virt, default
@@ -1649,15 +1624,6 @@ class OMR_EXTENSIBLE CodeGenerator
    bool getDisableNullCheckOfArrayLength() { return _flags3.testAny(CompactNullCheckOfArrayLengthDisabled); }
    void setDisableNullCheckOfArrayLength() { _flags3.set(CompactNullCheckOfArrayLengthDisabled); }
 
-   bool getSupportsShrinkWrapping() { return _flags3.testAny(SupportsShrinkWrapping); }
-   void setSupportsShrinkWrapping() { _flags3.set(SupportsShrinkWrapping); }
-
-   bool getShrinkWrappingDone() { return _flags3.testAny(ShrinkWrappingDone); }
-   void setShrinkWrappingDone() { _flags3.set(ShrinkWrappingDone); }
-
-   bool getUsesLoadStoreMultiple() { return _flags3.testAny(UsesLoadStoreMultiple); }
-   void setUsesLoadStoreMultiple() { _flags3.set(UsesLoadStoreMultiple); }
-
    bool getSupportsStackAllocationOfArraylets() {return _flags3.testAny(SupportsStackAllocationOfArraylets);}
    void setSupportsStackAllocationOfArraylets() {_flags3.set(SupportsStackAllocationOfArraylets);}
 
@@ -1776,13 +1742,13 @@ class OMR_EXTENSIBLE CodeGenerator
       RequiresCarry                                       = 0x00020000,
       MethodContainsBinaryCodedDecimal                    = 0x00040000,  // wcode
       ComputesCarry                                       = 0x00080000,
-      SupportsShrinkWrapping                              = 0x00100000,
-      ShrinkWrappingDone                                  = 0x00200000,
+      // AVAILABLE                                        = 0x00100000,
+      // AVAILABLE                                        = 0x00200000,
       SupportsStackAllocationOfArraylets                  = 0x00400000,
       //                                                  = 0x00800000,  AVAILABLE FOR USE!
       SupportsDoubleWordCAS                               = 0x01000000,
       SupportsDoubleWordSet                               = 0x02000000,
-      UsesLoadStoreMultiple                               = 0x04000000,
+      // AVAILABLE                                        = 0x04000000,
       ExpandExponentiation                                = 0x08000000,
       MultiplyIsDestructive                               = 0x10000000,
       //                                                  = 0x20000000,  AVAILABLE FOR USE!
@@ -1869,7 +1835,6 @@ class OMR_EXTENSIBLE CodeGenerator
    TR_InterferenceGraph *_localsIG;
    TR_BitVector *_currentGRABlockLiveOutSet;
    TR::Block *_currentBlock;
-   TR_BitVector *_preservedRegsInPrologue;
 
    TR::list<TR::SymbolReference*> _availableSpillTemps;
    TR::list<TR_LiveReference*> _liveReferenceList;
@@ -1906,8 +1871,6 @@ class OMR_EXTENSIBLE CodeGenerator
 
    TR::list<TR::Node*> _compressedRefs;
 
-   int32_t _lowestSavedReg;
-
    uint32_t _largestOutgoingArgSize;
 
    uint32_t _estimatedCodeLength;

compiler/codegen/OMRGCStackAtlas.cpp

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2000, 2016 IBM Corp. and others
+ * Copyright (c) 2000, 2018 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -81,8 +81,6 @@ OMR::GCStackAtlas::close(TR::CodeGenerator *cg)
           map->getRegisterMap() == nextMap->getRegisterMap() &&
           map->getHighWordRegisterMap() == nextMap->getHighWordRegisterMap() &&
           !memcmp(map->getMapBits(), nextMap->getMapBits(), mapBytes) &&
-          (comp->getOption(TR_DisableShrinkWrapping) ||
-           (map->getRegisterSaveDescription() == nextMap->getRegisterSaveDescription())) &&
           map->isByteCodeInfoIdenticalTo(nextMap))
          {
          // Maps are the same - can merge

compiler/codegen/OMRLinkage.hpp

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright (c) 2000, 2017 IBM Corp. and others
+ * Copyright (c) 2000, 2018 IBM Corp. and others
  *
  * This program and the accompanying materials are made available under
  * the terms of the Eclipse Public License 2.0 which accompanies this
@@ -94,13 +94,7 @@ class OMR_EXTENSIBLE Linkage
       {
       return NULL;
       }
-
-   virtual bool mapPreservedRegistersToStackOffsets(int32_t *mapRegsToStack, int32_t &numPreserved, TR_BitVector *&) { return false; }
-   virtual TR::Instruction *savePreservedRegister(TR::Instruction *cursor, int32_t regIndex, int32_t offset)    {return NULL; }
-   virtual TR::Instruction *restorePreservedRegister(TR::Instruction *cursor, int32_t regIndex, int32_t offset) {return NULL; }
-   virtual int32_t getRegisterSaveSize() { return 0; }
-   virtual TR::Instruction *composeSavesRestores(TR::Instruction *start, int32_t firstReg, int32_t lastReg, int32_t offset, int32_t numRegs, bool doSaves) { return NULL; }
-
+
    virtual bool isSpecialNonVolatileArgumentRegister(int8_t) { return false; }
 
    };

compiler/compile/OMRCompilation.cpp

@@ -1270,11 +1270,6 @@ void OMR::Compilation::performOptimizations()
 
    if (_optimizer)
       _optimizer->optimize();
-
-   if (self()->getOption(TR_DisableShrinkWrapping) &&
-       !TR::Compiler->target.cpu.isZ() && // 390 now uses UseDefs in CodeGenPrep
-       !self()->getOptions()->getVerboseOption(TR_VerboseCompYieldStats))
-      _optimizer = NULL;
    }
 
 bool OMR::Compilation::incInlineDepth(TR::ResolvedMethodSymbol * method, TR_ByteCodeInfo & bcInfo, int32_t cpIndex, TR::SymbolReference *callSymRef, bool directCall, TR_PrexArgInfo *argInfo)

compiler/control/OMROptions.cpp

@@ -514,7 +514,6 @@ TR::OptionTable OMR::Options::_jitOptions[] = {
 #endif
    {"disableShareableMethodHandleThunks",  "R\tdisable creation of shareable invokeExact thunks for MethodHandles", SET_OPTION_BIT(TR_DisableShareableMethodHandleThunks), "F", NOT_IN_SUBSET},
    {"disableSharedCacheHints",             "R\tdisable storing and loading hints from shared cache", SET_OPTION_BIT(TR_DisableSharedCacheHints), "F"},
-   {"disableShrinkWrapping",               "M\tdisable shrink wrapping of callee saved registers", SET_OPTION_BIT(TR_DisableShrinkWrapping), "F"},
    {"disableSIMD",                         "O\tdisable SIMD exploitation and infrastructure on platforms supporting vector register and instructions", SET_OPTION_BIT(TR_DisableSIMD), "F"},
    {"disableSIMDArrayCompare",            "O\tDisable vectorized array comparison using SIMD instruction", SET_OPTION_BIT(TR_DisableSIMDArrayCompare), "F"},
    {"disableSIMDArrayCopy",                "O\tDisable vectorized array copying using SIMD instruction", SET_OPTION_BIT(TR_DisableSIMDArrayCopy), "F"},
@@ -1255,7 +1254,6 @@ TR::OptionTable OMR::Options::_jitOptions[] = {
    {"traceScalarizeSSOps",              "L\ttrace scalarization of array/SS ops", SET_OPTION_BIT(TR_TraceScalarizeSSOps), "P"},
    {"traceSEL",                         "L\ttrace sign extension load", SET_OPTION_BIT(TR_TraceSEL), "P"},
    {"traceSequenceSimplification",      "L\ttrace arithmetic sequence simplification",     TR::Options::traceOptimization, expressionsSimplification, 0, "P"},
-   {"traceShrinkWrapping",              "L\ttrace shrink wrapping of callee saved registers ", SET_OPTION_BIT(TR_TraceShrinkWrapping), "P"},
    {"traceSpillCosts",                 "L\ttrace spill costs (basic) only show its activation",
         TR::Options::setBitsFromStringSet, offsetof(OMR::Options, _traceSpillCosts), TR_TraceSpillCostsBasic, "F"},
    {"traceSpillCosts=",                "L{regex}\tlist of additional spill costs options: basic, results, build, details",
@@ -2045,7 +2043,7 @@ OMR::Options::jitLatePostProcess(TR::OptionSet *optionSet, void * jitConfig)
       {
       if (!self()->getOption(TR_DisableOSR))
          self()->setOption(TR_EnableOSR); // Make OSR the default for FSD
-      self()->setOption(TR_DisableShrinkWrapping);
+
       self()->setOption(TR_DisableMethodHandleThunks); // Can't yet transition a MH thunk frame into equivalent interpreter frames
       }
 
@@ -2464,9 +2462,6 @@ OMR::Options::jitPreProcess()
    // All projects
    //
 
-   //Disabling Shrink Wrapping on all platforms (functional issues)
-   self()->setOption(TR_DisableShrinkWrapping);
-
    self()->setOption(TR_RestrictStaticFieldFolding);
 
    if (TR::Compiler->target.cpu.isPower())

compiler/control/OMROptions.hpp

@@ -462,7 +462,7 @@ enum TR_CompilationOptions
    // Avaiable                                = 0x80000000 + 11,
 
    // Option word 12
-   TR_TraceShrinkWrapping                     = 0x00000020 + 12,
+   // Avaiable                                = 0x00000020 + 12,
    TR_DisableZ13LoadAndMask                   = 0x00000040 + 12,
    TR_DisablePartialInlining                  = 0x00000080 + 12,
    TR_AssumeStartupPhaseUntilToldNotTo        = 0x00000100 + 12,
@@ -587,7 +587,7 @@ enum TR_CompilationOptions
    TR_DisableEmptyPreHeaderCheck                      = 0x00001000 + 16,
    TR_SinkOnlyCCStores                                = 0x00002000 + 16,
    TR_EnableDeterministicOrientedCompilation          = 0x00004000 + 16,
-   TR_DisableShrinkWrapping                           = 0x00008000 + 16,
+   // Avaiable                                        = 0x00008000 + 16,
    TR_EnableAOTStats                                  = 0x00010000 + 16,
    // Available                                       = 0x00020000 + 16,
    TR_DisableSynchronizedFieldLoad                    = 0x00040000 + 16,

compiler/env/TRMemory.cpp

@@ -129,7 +129,6 @@ const char * objectName[] =
    "InterProceduralAnalyzer",
    "InductionVariableAnalysis",
    "CoarseningInterProceduralAnalyzer",
-   "ShrinkWrapping",
 
    "AheadOfTimeCompile",
    "HWProfile",

compiler/env/TRMemory.hpp

@@ -275,7 +275,6 @@ class TR_MemoryBase
       InterProceduralAnalyzer,
       InductionVariableAnalysis,
       CoarseningInterProceduralAnalyzer,
-      ShrinkWrapping,
 
       AheadOfTimeCompile,