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// See LICENSE.SiFive for license details. | ||
// See LICENSE.Berkeley for license details. | ||
package freechips.rocketchip.prci | ||
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import Chisel._ | ||
import chisel3.experimental.IO | ||
import freechips.rocketchip.diplomacy._ | ||
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object IOHelper { | ||
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def forNonSynchronous[T <: Data](gen: => T, xs: Seq[ClockCrossingType], prefix: String): Seq[Option[ModuleValue[T]]] = { | ||
xs.zipWithIndex.map { case (x, i) => forNonSynchronous(gen, x, prefix + s"_$i") } | ||
} | ||
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def forNonSynchronous[T <: Data](gen: => T, x: ClockCrossingType, name: String): Option[ModuleValue[T]] = { | ||
x match { | ||
case SynchronousCrossing(_) => None | ||
case _ => Some(InModuleBody(IO(gen.asInput).suggestName(name))) | ||
} | ||
} | ||
} |