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percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @CacheLine parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
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Original file line number | Diff line number | Diff line change |
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@@ -136,7 +136,7 @@ SECTIONS | |
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. = ALIGN(16); | ||
INIT_DATA_SECTION(16) | ||
PERCPU(4) | ||
PERCPU(32, 4) | ||
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.exit.data : | ||
{ | ||
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Original file line number | Diff line number | Diff line change |
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@@ -42,7 +42,7 @@ | |
INIT_SETUP(0) | ||
} | ||
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PERCPU(32) | ||
PERCPU(32, 32) | ||
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.initcall.init : { | ||
INIT_CALLS | ||
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