unaligned accesses on RISC processors

[gco]

This sort of code is not portable and tends to not work on RISC processors:

  case BSER_INT16:
      *val = *(int16_t*)(buf+1);
      return 1;
    case BSER_INT32:
      *val = *(int32_t*)(buf+1);
      return 1;
    case BSER_INT64:
      *val = *(int64_t*)(buf+1);
      return 1;

It fails with bus errors on SPARC, for example, when the alignment isn't correct.

• bser_real(), bunser() - dereferences double pointer of unknown alignment
• bser_int(), bunser_int() - dereferences 16-bit, 32-bit, and 64-bit integer pointers of unknown alignment

[wez]

Sorry, didn't to sit on this for so long. I don't have access to SPARC hardware at this time. I would be happy to accept a patch that resolves this. ISTR that the simplest solution is to revise these accesses to use memcpy and allow the memcpy implementation to deal with managing alignment.

I believe the patch will be relatively straightforward, but I don't have a machine with this architecture to validate it.

Are you in a position to tackle this?

[wez]

The commit above should take care of this AFAICT. Please re-open if there is more to be done here.