Merge branch 'feat/isp_dvp_driver_v5.3' into 'release/v5.3'

isp: dvp driver (v5.3)

See merge request espressif/esp-idf!31261

components/esp_driver_cam/CMakeLists.txt

@@ -1,13 +1,29 @@
-set(srcs "esp_cam_ctlr.c")
+idf_build_get_property(target IDF_TARGET)
 
-set(include "include" "interface")
+set(srcs "esp_cam_ctlr.c" "dvp_share_ctrl.c")
+
+set(includes "include" "interface")
+
+set(requires "esp_driver_isp")
+
+set(priv_requires "esp_driver_gpio")
 
 if(CONFIG_SOC_MIPI_CSI_SUPPORTED)
     list(APPEND srcs "csi/src/esp_cam_ctlr_csi.c")
-    list(APPEND include "csi/include")
+    list(APPEND includes "csi/include")
+endif()
+
+if(CONFIG_SOC_ISP_DVP_SUPPORTED)
+    list(APPEND srcs "isp_dvp/src/esp_cam_ctlr_isp_dvp.c")
+    list(APPEND includes "isp_dvp/include")
+endif()
+
+if(NOT ${target} STREQUAL "linux")
+    list(APPEND requires esp_mm)
 endif()
 
 idf_component_register(SRCS ${srcs}
-                       INCLUDE_DIRS ${include}
-                       PRIV_REQUIRES esp_mm
+                       INCLUDE_DIRS ${includes}
+                       REQUIRES ${requires}
+                       PRIV_REQUIRES ${priv_requires}
                       )

components/esp_driver_cam/Kconfig

@@ -1,11 +1,27 @@
-menu "ESP Camera Controller Configurations"
+menu "ESP-Driver:Camera Controller Configurations"
+
     depends on SOC_MIPI_CSI_SUPPORTED
 
-    config MIPI_CSI_ISR_IRAM_SAFE
+    config CAM_CTLR_MIPI_CSI_ISR_IRAM_SAFE
         bool "CSI ISR IRAM-Safe"
         default n
+        select DW_GDMA_ISR_IRAM_SAFE
+        select DW_GDMA_CTRL_FUNC_IN_IRAM
+        select DW_GDMA_SETTER_FUNC_IN_IRAM
+        select DW_GDMA_GETTER_FUNC_IN_IRAM
         help
             Ensure the CSI driver ISR is IRAM-Safe. When enabled, the ISR handler
             will be available when the cache is disabled.
 
+    config CAM_CTLR_ISP_DVP_ISR_IRAM_SAFE
+        bool "ISP_DVP ISR IRAM-Safe"
+        default n
+        select DW_GDMA_ISR_IRAM_SAFE
+        select DW_GDMA_CTRL_FUNC_IN_IRAM
+        select DW_GDMA_SETTER_FUNC_IN_IRAM
+        select DW_GDMA_GETTER_FUNC_IN_IRAM
+        help
+            Ensure the ISP_DVP driver ISR is IRAM-Safe. When enabled, the ISR handler
+            will be available when the cache is disabled.
+
 endmenu # ESP Camera Controller Configurations

components/esp_driver_cam/csi/include/esp_cam_ctlr_csi.h

@@ -15,11 +15,6 @@
 extern "C" {
 #endif
 
-/**
- * @brief ESP CAM controller max timeout value
- */
-#define ESP_CAM_CTLR_MAX_DELAY UINT32_MAX
-
 /**
  * @brief ESP CAM CSI controller configurations
  */
@@ -30,8 +25,8 @@ typedef struct {
     uint32_t v_res;                             ///< Input vertical resolution, i.e. the number of lines in a frame
     uint8_t data_lane_num;                      ///< Data lane num
     int lane_bit_rate_mbps;                     ///< Lane bit rate in Mbps
-    mipi_csi_color_t input_data_color_type;     ///< Input color type
-    mipi_csi_color_t output_data_color_type;    ///< Output color type
+    cam_ctlr_color_t input_data_color_type;     ///< Input color type
+    cam_ctlr_color_t output_data_color_type;    ///< Output color type
     int queue_items;                            ///< Queue items
     struct {
         uint32_t byte_swap_en   : 1;            ///< Enable byte swap

components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c

@@ -24,7 +24,7 @@
 #include "esp_private/esp_cache_private.h"
 #include "esp_cache.h"
 
-#if CONFIG_MIPI_CSI_ISR_IRAM_SAFE
+#if CONFIG_CAM_CTLR_MIPI_CSI_ISR_IRAM_SAFE
 #define CSI_MEM_ALLOC_CAPS   (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
 #else
 #define CSI_MEM_ALLOC_CAPS   MALLOC_CAP_DEFAULT
@@ -66,7 +66,6 @@ static esp_err_t s_csi_claim_controller(csi_controller_t *controller)
                 mipi_csi_ll_enable_host_bus_clock(i, 1);
                 mipi_csi_ll_reset_host_clock(i);
             }
-            _lock_release(&s_platform.mutex);
             break;
         }
     }
@@ -295,7 +294,7 @@ static esp_err_t s_csi_ctlr_get_buffer_length(esp_cam_ctlr_handle_t handle, size
     return ESP_OK;
 }
 
-static bool csi_dma_trans_done_callback(dw_gdma_channel_handle_t chan, const dw_gdma_trans_done_event_data_t *event_data, void *user_data)
+IRAM_ATTR static bool csi_dma_trans_done_callback(dw_gdma_channel_handle_t chan, const dw_gdma_trans_done_event_data_t *event_data, void *user_data)
 {
     bool need_yield = false;
     BaseType_t high_task_woken = pdFALSE;
@@ -381,7 +380,7 @@ esp_err_t s_register_event_callbacks(esp_cam_ctlr_handle_t handle, const esp_cam
     csi_controller_t *ctlr = __containerof(handle, csi_controller_t, base);
     ESP_RETURN_ON_FALSE(ctlr->csi_fsm == CSI_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "driver starts already, not allow cbs register");
 
-#if CONFIG_MIPI_CSI_ISR_IRAM_SAFE
+#if CONFIG_CAM_CTLR_MIPI_CSI_ISR_IRAM_SAFE
     if (cbs->on_get_new_trans) {
         ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_get_new_trans), ESP_ERR_INVALID_ARG, TAG, "on_get_new_trans callback not in IRAM");
     }
@@ -414,7 +413,7 @@ esp_err_t s_csi_ctlr_disable(esp_cam_ctlr_handle_t handle)
 {
     ESP_RETURN_ON_FALSE(handle, ESP_ERR_INVALID_ARG, TAG, "invalid argument: null pointer");
     csi_controller_t *ctlr = __containerof(handle, csi_controller_t, base);
-    ESP_RETURN_ON_FALSE(ctlr->csi_fsm == CSI_FSM_ENABLED, ESP_ERR_INVALID_STATE, TAG, "processor isn't in init state");
+    ESP_RETURN_ON_FALSE(ctlr->csi_fsm == CSI_FSM_ENABLED, ESP_ERR_INVALID_STATE, TAG, "processor isn't in enable state");
 
     portENTER_CRITICAL(&ctlr->spinlock);
     ctlr->csi_fsm = CSI_FSM_INIT;
@@ -486,7 +485,7 @@ esp_err_t s_ctlr_csi_stop(esp_cam_ctlr_handle_t handle)
     ESP_RETURN_ON_ERROR(dw_gdma_channel_enable_ctrl(ctlr->dma_chan, false), TAG, "failed to disable dwgdma");
 
     portENTER_CRITICAL(&ctlr->spinlock);
-    ctlr->csi_fsm = CSI_FSM_INIT;
+    ctlr->csi_fsm = CSI_FSM_ENABLED;
     portEXIT_CRITICAL(&ctlr->spinlock);
 
     return ESP_OK;

components/esp_driver_cam/dvp_share_ctrl.c

@@ -0,0 +1,36 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <esp_types.h>
+#include "sdkconfig.h"
+#include "esp_log.h"
+#include "esp_err.h"
+#include "freertos/FreeRTOS.h"
+
+bool dvp_signal_used;
+static portMUX_TYPE s_spinlock = portMUX_INITIALIZER_UNLOCKED;
+
+esp_err_t dvp_shared_ctrl_claim_io_signals(void)
+{
+    esp_err_t ret = ESP_ERR_NOT_FOUND;
+    portENTER_CRITICAL(&s_spinlock);
+    if (!dvp_signal_used) {
+        dvp_signal_used = true;
+        ret = ESP_OK;
+    }
+    portEXIT_CRITICAL(&s_spinlock);
+
+    return ret;
+}
+
+esp_err_t dvp_shared_ctrl_declaim_io_signals(void)
+{
+    portENTER_CRITICAL(&s_spinlock);
+    dvp_signal_used = false;
+    portEXIT_CRITICAL(&s_spinlock);
+
+    return ESP_OK;
+}

components/esp_driver_cam/dvp_share_ctrl.h

@@ -0,0 +1,28 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <esp_types.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief  Claim DVP IO signal usage
+ */
+esp_err_t dvp_shared_ctrl_claim_io_signals(void);
+
+/**
+ * @brief  Declaim DVP IO signal usage
+ */
+esp_err_t dvp_shared_ctrl_declaim_io_signals(void);
+
+#ifdef __cplusplus
+}
+#endif

components/esp_driver_cam/include/esp_cam_ctlr_types.h

@@ -14,6 +14,11 @@
 extern "C" {
 #endif
 
+/**
+ * @brief ESP CAM controller max timeout value
+ */
+#define ESP_CAM_CTLR_MAX_DELAY UINT32_MAX
+
 /**
  * @brief ESP CAM controller handle
  */

components/esp_driver_cam/isp_dvp/include/esp_cam_ctlr_isp_dvp.h

@@ -0,0 +1,59 @@
+/*
+ * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "esp_err.h"
+#include "driver/isp_types.h"
+#include "hal/cam_ctlr_types.h"
+#include "esp_cam_ctlr_types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief ESP CAM ISP DVP controller configurations
+ */
+typedef struct {
+    cam_ctlr_data_width_t data_width;             ///< Number of data lines
+    int data_io[ISP_DVP_DATA_SIG_NUM];            ///< ISP DVP data-in IO numbers
+    int pclk_io;                                  ///< ISP DVP pclk IO numbers
+    int hsync_io;                                 ///< ISP DVP hsync IO numbers
+    int vsync_io;                                 ///< ISP DVP vsync IO numbers
+    int de_io;                                    ///< ISP DVP de IO numbers
+    struct {
+        uint32_t pclk_invert: 1;                  ///< The pclk is inverted
+        uint32_t hsync_invert: 1;                 ///< The hsync signal is inverted
+        uint32_t vsync_invert: 1;                 ///< The vsync signal is inverted
+        uint32_t de_invert: 1;                    ///< The de signal is inverted
+    } io_flags;                                   ///< ISP DVP IO flags
+    int queue_items;                              ///< Queue items
+    struct {
+        uint32_t byte_swap_en   : 1;              ///< Enable byte swap
+        uint32_t bk_buffer_dis  : 1;              ///< Disable backup buffer
+    };
+} esp_cam_ctlr_isp_dvp_cfg_t;
+
+/**
+ * @brief New ESP CAM ISP DVP controller
+ *
+ * @param[in]  ctlr_config  ISP DVP controller configurations
+ * @param[out] ret_handle   Returned ESP CAM controller handle
+ *
+ * @return
+ *        - ESP_OK
+ *        - ESP_ERR_INVALID_ARG:   Invalid argument
+ *        - ESP_ERR_NO_MEM:        Out of memory
+ *        - ESP_ERR_NOT_SUPPORTED: Currently not support modes or types
+ *        - ESP_ERR_NOT_FOUND:     ISP DVP is registered already
+ */
+esp_err_t esp_cam_new_isp_dvp_ctlr(isp_proc_handle_t isp_proc, const esp_cam_ctlr_isp_dvp_cfg_t *ctlr_config, esp_cam_ctlr_handle_t *ret_handle);
+
+#ifdef __cplusplus
+}
+#endif