debug_stubs: Refactor and add support for RISCV

components/app_trace/port/riscv/port.c

@@ -1,3 +1,9 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
 #include "esp_log.h"
 #include "esp_app_trace_membufs_proto.h"
 #include "esp_app_trace_port.h"
@@ -94,25 +100,10 @@ esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data)
    e.g. OpenOCD flasher stub use own implementation of it. */
 __attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_addr)
 {
-    register int sys_nr = RISCV_APPTRACE_SYSNR;
-    register int host_ret = 0;
-
     if (!esp_cpu_in_ocd_debug_mode()) {
         return 0;
     }
-    __asm__ volatile ( \
-        ".option push\n" \
-        ".option norvc\n" \
-        "mv a0, %[sys_nr]\n" \
-        "mv a1, %[arg1]\n" \
-        "slli    zero,zero,0x1f\n" \
-        "ebreak\n" \
-        "srai    zero,zero,0x7\n" \
-        "mv %[host_ret], a0\n" \
-    	".option pop\n" \
-        :[host_ret]"=r"(host_ret)
-        :[sys_nr]"r"(sys_nr),[arg1]"r"(ctrl_block_addr):"a0","a1");
-    return host_ret;
+    return cpu_hal_syscall(RISCV_APPTRACE_SYSNR, (int)ctrl_block_addr, 0, 0, 0, NULL);
 }
 
 /* Returns up buffers config.

components/esp32c3/Kconfig

@@ -56,14 +56,6 @@ menu "ESP32C3-Specific"
             The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
             instead of panicking, have the debugger stop on the offending instruction.
 
-    config ESP32C3_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32C3_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
     config ESP32C3_BROWNOUT_DET
         bool "Hardware brownout detect & reset"
         depends on !IDF_ENV_FPGA

components/esp32h2/Kconfig

@@ -53,14 +53,6 @@ menu "ESP32H2-Specific"
             The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
             instead of panicking, have the debugger stop on the offending instruction.
 
-    config ESP32H2_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32H2_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
     config ESP32H2_BROWNOUT_DET
         bool "Hardware brownout detect & reset"
         default y

components/esp32s2/Kconfig

@@ -256,14 +256,6 @@ menu "ESP32S2-specific"
             The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
             instead of panicking, have the debugger stop on the offending instruction.
 
-    config ESP32S2_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32S2_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
     config ESP32S2_BROWNOUT_DET
         bool "Hardware brownout detect & reset"
         depends on !IDF_ENV_FPGA

components/esp32s3/Kconfig

@@ -328,14 +328,6 @@ menu "ESP32S3-Specific"
             The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
             instead of panicking, have the debugger stop on the offending instruction.
 
-    config ESP32S3_DEBUG_STUBS_ENABLE
-        bool "OpenOCD debug stubs"
-        default COMPILER_OPTIMIZATION_LEVEL_DEBUG
-        depends on !ESP32S3_TRAX
-        help
-            Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
-            e.g. GCOV data dump.
-
     config ESP32S3_BROWNOUT_DET
         bool "Hardware brownout detect & reset"
         depends on !IDF_ENV_FPGA

components/esp_system/CMakeLists.txt

@@ -22,11 +22,8 @@ else()
             "stack_check.c"
             "task_wdt.c"
             "ubsan.c"
-            "xt_wdt.c")
-
-    if(NOT (${target} STREQUAL "esp32c3") AND NOT (${target} STREQUAL "esp32h2"))
-        list(APPEND srcs  "dbg_stubs.c")
-    endif()
+            "xt_wdt.c"
+            "debug_stubs.c")
 
     if(CONFIG_ESP_SYSTEM_USE_EH_FRAME)
         list(APPEND srcs "eh_frame_parser.c")

components/esp_system/Kconfig

@@ -474,7 +474,7 @@ menu "ESP System Settings"
             is triggered.
 
     config ESP_DEBUG_STUBS_ENABLE
-        bool
+        bool "OpenOCD debug stubs"
         default COMPILER_OPTIMIZATION_LEVEL_DEBUG
         depends on !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX
         help

components/esp_system/dbg_stubs.c → components/esp_system/debug_stubs.c

@@ -1,27 +1,16 @@
-// Copyright 2017 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 
 // This module implements debug/trace stubs. The stub is a piece of special code which can invoked by OpenOCD
 // Currently one stub is used for GCOV functionality
 //
 
-#include "eri.h"
-#include "xtensa-debug-module.h"
 #include "esp_private/dbg_stubs.h"
 #include "esp_attr.h"
 
-#if CONFIG_ESP_DEBUG_STUBS_ENABLE
 /*
     Debug stubs is actually a table of 4-byte entries. Every entry is equal to zero or must contain meaningfull data.
     The first entry is a service one and has the followinf format:
@@ -35,7 +24,6 @@
 #include "esp_log.h"
 const static char *TAG = "esp_dbg_stubs";
 
-#define ESP_DBG_STUBS_TRAX_REG              ERI_TRAX_TRIGGERPC
 #define ESP_DBG_STUBS_CODE_BUF_SIZE         32
 #define ESP_DBG_STUBS_STACK_MIN_SIZE        2048
 
@@ -52,6 +40,8 @@ static uint32_t s_stub_entry[ESP_DBG_STUB_ENTRY_MAX];
 static uint8_t s_stub_min_stack[ESP_DBG_STUBS_STACK_MIN_SIZE];
 static DBG_STUB_TRAMP_ATTR uint8_t s_stub_code_buf[ESP_DBG_STUBS_CODE_BUF_SIZE];
 
+extern void esp_dbg_stubs_ll_init(void *stub_table_addr);
+
 // TODO: all called funcs should be in IRAM to work with disabled flash cache
 static void * esp_dbg_stubs_data_alloc(uint32_t size)
 {
@@ -78,8 +68,7 @@ void esp_dbg_stubs_init(void)
     s_stub_entry[ESP_DBG_STUB_MAGIC_NUM] = ESP_DBG_STUB_MAGIC_NUM_VAL;
     s_stub_entry[ESP_DBG_STUB_TABLE_SIZE] = ESP_DBG_STUB_ENTRY_MAX;
     s_stub_entry[ESP_DBG_STUB_CONTROL_DATA] = (uint32_t)&s_dbg_stubs_ctl_data;
-    eri_write(ESP_DBG_STUBS_TRAX_REG, (uint32_t)s_stub_entry);
-    ESP_LOGV(TAG, "%s stubs %x", __func__, eri_read(ESP_DBG_STUBS_TRAX_REG));
+    esp_dbg_stubs_ll_init(s_stub_entry);
 }
 
 // TODO: add lock mechanism. Not now but in the future ESP_DBG_STUB_ENTRY_CAPABILITIES can be set from different places.
@@ -104,5 +93,3 @@ esp_err_t esp_dbg_stub_entry_get(esp_dbg_stub_id_t id, uint32_t *entry)
 
     return ESP_OK;
 }
-
-#endif

components/esp_system/port/arch/riscv/debug_stubs.c

@@ -0,0 +1,34 @@
+/*
+ * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// This module implements debug/trace stubs. The stub is a piece of special code which can invoked by OpenOCD
+// Currently one stub is used for GCOV functionality
+//
+
+#include "esp_cpu.h"
+#include "hal/cpu_hal.h"
+
+#include "esp_log.h"
+const static char *TAG = "esp_dbg_stubs";
+
+#define RISCV_DBG_STUBS_SYSNR    0x65
+
+/* Advertises apptrace control block address to host */
+static int esp_dbg_stubs_advertise_table(void *stub_table_addr)
+{
+    if (!esp_cpu_in_ocd_debug_mode()) {
+        return 0;
+    }
+    return cpu_hal_syscall(RISCV_DBG_STUBS_SYSNR, (int)stub_table_addr, 0, 0, 0, NULL);
+}
+
+void esp_dbg_stubs_ll_init(void *stub_table_addr)
+{
+    // notify host about control block address
+    int res = esp_dbg_stubs_advertise_table(stub_table_addr);
+    assert(res == 0 && "Falied to send debug stubs table address to host!");
+    ESP_LOGV(TAG, "%s stubs %x", __func__, stub_table_addr);
+}

components/esp_system/port/arch/xtensa/debug_stubs.c

@@ -0,0 +1,23 @@
+/*
+ * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// This module implements debug/trace stubs. The stub is a piece of special code which can invoked by OpenOCD
+// Currently one stub is used for GCOV functionality
+//
+
+#include "eri.h"
+#include "xtensa-debug-module.h"
+
+#include "esp_log.h"
+const static char *TAG = "esp_dbg_stubs";
+
+#define ESP_DBG_STUBS_TRAX_REG              ERI_TRAX_TRIGGERPC
+
+void esp_dbg_stubs_ll_init(void *stub_table)
+{
+    eri_write(ESP_DBG_STUBS_TRAX_REG, (uint32_t)stub_table);
+    ESP_LOGV(TAG, "%s stubs %x", __func__, eri_read(ESP_DBG_STUBS_TRAX_REG));
+}

components/esp_system/port/soc/esp32/CMakeLists.txt

@@ -9,6 +9,7 @@ set(srcs "highint_hdl.S"
          "../../arch/xtensa/expression_with_stack_asm.S"
          "../../arch/xtensa/debug_helpers.c"
          "../../arch/xtensa/debug_helpers_asm.S"
+         "../../arch/xtensa/debug_stubs.c"
          "../../arch/xtensa/trax.c"
          )
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})

components/esp_system/port/soc/esp32c3/CMakeLists.txt

@@ -5,7 +5,8 @@ set(srcs "clk.c"
          "apb_backup_dma.c"
          "../../arch/riscv/expression_with_stack.c"
          "../../arch/riscv/expression_with_stack_asm.S"
-         "../../arch/riscv/panic_arch.c")
+         "../../arch/riscv/panic_arch.c"
+         "../../arch/riscv/debug_stubs.c")
 
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
 

components/esp_system/port/soc/esp32h2/CMakeLists.txt

@@ -5,7 +5,9 @@ set(srcs "clk.c"
          "apb_backup_dma.c"
          "../../arch/riscv/expression_with_stack.c"
          "../../arch/riscv/expression_with_stack_asm.S"
-         "../../arch/riscv/panic_arch.c")
+         "../../arch/riscv/panic_arch.c"
+         "../../arch/riscv/debug_stubs.c")
+
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})
 
 target_sources(${COMPONENT_LIB} PRIVATE ${srcs})

components/esp_system/port/soc/esp32s2/CMakeLists.txt

@@ -9,6 +9,7 @@ set(srcs "highint_hdl.S"
          "../../arch/xtensa/expression_with_stack_asm.S"
          "../../arch/xtensa/debug_helpers.c"
          "../../arch/xtensa/debug_helpers_asm.S"
+         "../../arch/xtensa/debug_stubs.c"
          "../../arch/xtensa/trax.c"
          )
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})

components/esp_system/port/soc/esp32s3/CMakeLists.txt

@@ -10,6 +10,7 @@ set(srcs "highint_hdl.S"
          "../../arch/xtensa/expression_with_stack_asm.S"
          "../../arch/xtensa/debug_helpers.c"
          "../../arch/xtensa/debug_helpers_asm.S"
+         "../../arch/xtensa/debug_stubs.c"
          "../../arch/xtensa/trax.c"
          )
 add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs})

components/hal/esp32c3/include/hal/cpu_ll.h

@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #pragma once
 
 #include <stdint.h>
@@ -151,6 +143,34 @@ static inline void cpu_ll_break(void)
     return;
 }
 
+static inline int cpu_ll_syscall(int sys_nr, int arg1, int arg2, int arg3, int arg4, int* ret_errno)
+{
+    int host_ret, host_errno;
+
+    asm volatile ( \
+        ".option push\n" \
+        ".option norvc\n" \
+        "mv a0, %[sys_nr]\n" \
+        "mv a1, %[arg1]\n" \
+        "mv a2, %[arg2]\n" \
+        "mv a3, %[arg3]\n" \
+        "mv a4, %[arg4]\n" \
+        "slli    zero,zero,0x1f\n" \
+        "ebreak\n" \
+        "srai    zero,zero,0x7\n" \
+        "mv %[host_ret], a0\n" \
+        "mv %[host_errno], a1\n" \
+        ".option pop\n" \
+        :[host_ret]"=r"(host_ret),[host_errno]"=r"(host_errno)
+        :[sys_nr]"r"(sys_nr),[arg1]"r"(arg1),[arg2]"r"(arg2),[arg3]"r"(arg3),[arg4]"r"(arg4)
+        :"a0","a1","a2","a3","a4");
+
+    if (ret_errno) {
+        *ret_errno = host_errno;
+    }
+    return host_ret;
+}
+
 static inline void cpu_ll_set_vecbase(const void* vecbase)
 {
     uintptr_t vecbase_int = (uintptr_t)vecbase;