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Add ESP32-C2 support #8881

Merged
merged 17 commits into from
Nov 21, 2023
Merged

Add ESP32-C2 support #8881

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81f63a9
add c2
Jason2866 Nov 13, 2023
6908de4
Fix typo
Jason2866 Nov 13, 2023
c43e3e2
changes from code review
Jason2866 Nov 13, 2023
089d2c7
rm hack needed to compile for c2
Jason2866 Nov 13, 2023
a052f49
rm `DARDUINO_USB_MODE=1` not needed for c2
Jason2866 Nov 13, 2023
607547c
log_e message no RMT support
Jason2866 Nov 13, 2023
6e20def
correct log_e
Jason2866 Nov 13, 2023
b291ba8
Update esp32-hal-rgb-led.c
Jason2866 Nov 13, 2023
6b978a2
Merge branch 'master' into add_c2
me-no-dev Nov 13, 2023
c793795
Add component test build for ESP32-C2
me-no-dev Nov 13, 2023
2cf4974
Disable most components for ESP32-C2
me-no-dev Nov 13, 2023
f18c91f
Add missing ADC SOC defines for ESP32-C2
me-no-dev Nov 13, 2023
047e82b
Add hidden board definition and fix LED pin in variant
me-no-dev Nov 13, 2023
6a0ec68
Add default empty zigbee libs and mode
me-no-dev Nov 14, 2023
1acbec2
Change SPI default pins
Jason2866 Nov 20, 2023
d0c4207
Merge branch 'master' into add_c2
P-R-O-C-H-Y Nov 20, 2023
8cc5a6e
change rx1 tx1 default gpio
Jason2866 Nov 21, 2023
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2 changes: 1 addition & 1 deletion .github/workflows/push.yml
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Expand Up @@ -93,7 +93,7 @@ jobs:
# https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/tools/idf-docker-image.html
# for details.
idf_ver: ["release-v5.1"]
idf_target: ["esp32", "esp32s2", "esp32s3", "esp32c3", "esp32c6", "esp32h2"]
idf_target: ["esp32", "esp32s2", "esp32s3", "esp32c2", "esp32c3", "esp32c6", "esp32h2"]
container: espressif/idf:${{ matrix.idf_ver }}
steps:
- name: Check out arduino-esp32 as a component
Expand Down
5 changes: 4 additions & 1 deletion cores/esp32/Esp.cpp
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Expand Up @@ -48,6 +48,9 @@ extern "C" {
#include "esp32s3/rom/spi_flash.h"
#include "soc/efuse_reg.h"
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32s3 is located at 0x0000
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/spi_flash.h"
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c2 is located at 0x0000
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/spi_flash.h"
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32c3 is located at 0x0000
Expand Down Expand Up @@ -366,7 +369,7 @@ FlashMode_t EspClass::getFlashChipMode(void)
#if CONFIG_IDF_TARGET_ESP32S2
uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
#else
#if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C6
#if CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6
uint32_t spi_ctrl = REG_READ(DR_REG_SPI0_BASE + 0x8);
#else
uint32_t spi_ctrl = REG_READ(SPI_CTRL_REG(0));
Expand Down
8 changes: 8 additions & 0 deletions cores/esp32/HardwareSerial.h
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Expand Up @@ -118,6 +118,8 @@ typedef enum {
#define SOC_RX0 (gpio_num_t)3
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#define SOC_RX0 (gpio_num_t)44
#elif CONFIG_IDF_TARGET_ESP32C2
#define SOC_RX0 (gpio_num_t)19
#elif CONFIG_IDF_TARGET_ESP32C3
#define SOC_RX0 (gpio_num_t)20
#elif CONFIG_IDF_TARGET_ESP32C6
Expand All @@ -132,6 +134,8 @@ typedef enum {
#define SOC_TX0 (gpio_num_t)1
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#define SOC_TX0 (gpio_num_t)43
#elif CONFIG_IDF_TARGET_ESP32C2
#define SOC_TX0 (gpio_num_t)20
#elif CONFIG_IDF_TARGET_ESP32C3
#define SOC_TX0 (gpio_num_t)21
#elif CONFIG_IDF_TARGET_ESP32C6
Expand All @@ -149,6 +153,8 @@ typedef enum {
#define RX1 (gpio_num_t)26
#elif CONFIG_IDF_TARGET_ESP32S2
#define RX1 (gpio_num_t)4
#elif CONFIG_IDF_TARGET_ESP32C2
#define RX1 (gpio_num_t)9
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#elif CONFIG_IDF_TARGET_ESP32C3
#define RX1 (gpio_num_t)18
#elif CONFIG_IDF_TARGET_ESP32S3
Expand All @@ -165,6 +171,8 @@ typedef enum {
#define TX1 (gpio_num_t)27
#elif CONFIG_IDF_TARGET_ESP32S2
#define TX1 (gpio_num_t)5
#elif CONFIG_IDF_TARGET_ESP32C2
#define TX1 (gpio_num_t)10
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#elif CONFIG_IDF_TARGET_ESP32C3
#define TX1 (gpio_num_t)19
#elif CONFIG_IDF_TARGET_ESP32S3
Expand Down
8 changes: 8 additions & 0 deletions cores/esp32/esp32-hal-adc.c
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Expand Up @@ -21,6 +21,14 @@
#include "esp_adc/adc_continuous.h"
#include "esp_adc/adc_cali_scheme.h"

// ESP32-C2 does not define those two for some reason
#ifndef SOC_ADC_DIGI_RESULT_BYTES
#define SOC_ADC_DIGI_RESULT_BYTES (4)
#endif
#ifndef SOC_ADC_DIGI_DATA_BYTES_PER_CONV
#define SOC_ADC_DIGI_DATA_BYTES_PER_CONV (4)
#endif

static uint8_t __analogAttenuation = ADC_11db;
static uint8_t __analogWidth = SOC_ADC_RTC_MAX_BITWIDTH;
static uint8_t __analogReturnedWidth = SOC_ADC_RTC_MAX_BITWIDTH;
Expand Down
10 changes: 6 additions & 4 deletions cores/esp32/esp32-hal-cpu.c
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Expand Up @@ -19,7 +19,7 @@
#include "esp_attr.h"
#include "esp_log.h"
#include "soc/rtc.h"
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#include "soc/rtc_cntl_reg.h"
#include "soc/apb_ctrl_reg.h"
#endif
Expand All @@ -38,6 +38,8 @@
#elif CONFIG_IDF_TARGET_ESP32S3
#include "freertos/xtensa_timer.h"
#include "esp32s3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C6
Expand Down Expand Up @@ -153,7 +155,7 @@ bool removeApbChangeCallback(void * arg, apb_change_cb_t cb){
}

static uint32_t calculateApb(rtc_cpu_freq_config_t * conf){
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
return APB_CLK_FREQ;
#else
if(conf->freq_mhz >= 80){
Expand Down Expand Up @@ -228,7 +230,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
}
//Make the frequency change
rtc_clk_cpu_freq_set_config_fast(&conf);
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
if(capb != apb){
//Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
//if(conf.freq_mhz < 80){
Expand All @@ -241,7 +243,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz){
}
#endif
//Update FreeRTOS Tick Divisor
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2

#elif CONFIG_IDF_TARGET_ESP32S3

Expand Down
4 changes: 2 additions & 2 deletions cores/esp32/esp32-hal-i2c-slave.c
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Expand Up @@ -168,7 +168,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw)

static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)
{
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
return hw->sr.slave_addressed;
#else
return hw->status_reg.slave_addressed;
Expand All @@ -177,7 +177,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw)

static inline bool i2c_ll_slave_rw(i2c_dev_t *hw)//not exposed by hal_ll
{
#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
return hw->sr.slave_rw;
#else
return hw->status_reg.slave_rw;
Expand Down
2 changes: 2 additions & 0 deletions cores/esp32/esp32-hal-matrix.c
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Expand Up @@ -24,6 +24,8 @@
#include "esp32s2/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32C6
Expand Down
4 changes: 3 additions & 1 deletion cores/esp32/esp32-hal-misc.c
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Expand Up @@ -29,7 +29,7 @@
#endif //CONFIG_BT_ENABLED
#include <sys/time.h>
#include "soc/rtc.h"
#if !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
#include "soc/rtc_cntl_reg.h"
#include "soc/apb_ctrl_reg.h"
#endif
Expand All @@ -45,6 +45,8 @@
#include "esp32s2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C6
Expand Down
6 changes: 6 additions & 0 deletions cores/esp32/esp32-hal-rgb-led.c
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@@ -1,7 +1,10 @@
#include "soc/soc_caps.h"

#include "esp32-hal-rgb-led.h"
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void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue_val){
#if SOC_RMT_SUPPORTED
rmt_data_t led_data[24];

// Verify if the pin used is RGB_BUILTIN and fix GPIO number
Expand Down Expand Up @@ -34,4 +37,7 @@ void neopixelWrite(uint8_t pin, uint8_t red_val, uint8_t green_val, uint8_t blue
}
}
rmtWrite(pin, led_data, RMT_SYMBOLS_OF(led_data), RMT_WAIT_FOR_EVER);
#else
log_e("RMT is not supported on " CONFIG_IDF_TARGET);
#endif /* SOC_RMT_SUPPORTED */
}
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