Udpate H2 and C6 clocks. Remove i2c_clock for all chips but ESP32 #592
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SergioGasquez
commented
Jun 15, 2023
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| let pcr = unsafe { &*crate::peripherals::PCR::PTR }; | ||
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| // switch spimem to PLL 64Mhz clock | ||
| unsafe { | ||
| pcr.mspi_conf.modify(|_, w| w.mspi_clk_sel().bits(0b10)); | ||
| } |
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Removed this as @playfulFence and I couldn't find the source of this.
H2 and C6 are the same in esp-idf:
SergioGasquez
commented
Jun 15, 2023
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| pcr.ahb_freq_conf | ||
| .modify(|_, w| w.ahb_div_num().bits(_div - 1)); |
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We were duplicating the clk_ll_ahb_set_divider fn
SergioGasquez
commented
Jun 15, 2023
esp-hal-common/src/clock/mod.rs
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| #[cfg(any(esp32c6, esp32h2))] | ||
| Pll48MHz, | ||
| #[cfg(esp32h2)] | ||
| Pll64MHz, | ||
| #[cfg(esp32c6)] | ||
| Pll80MHz, | ||
| #[cfg(esp32h2)] | ||
| Pll96MHz, | ||
| #[cfg(esp32c6)] | ||
| Pll160MHz, | ||
| #[cfg(esp32c6)] | ||
| Pll240MHz, | ||
| #[cfg(not(any(esp32c2, esp32c6, esp32h2)))] | ||
| Pll320MHz, | ||
| #[cfg(not(esp32h2))] | ||
| Pll480MHz, |
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SergioGasquez
commented
Jun 15, 2023
| pll_48m_clock: HertzU32::MHz(48), | ||
| crypto_clock: HertzU32::MHz(96), |
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See CRYPTO_CLK of the Resets and clocks chapter of the H2 TRM
jessebraham
approved these changes
Jun 19, 2023
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Gathered some information about I2C clocks in the different chips in this HackMD: https://hackmd.io/@SergioGasquez/r1dvX1AHh
Checked the I2C freq for some devices:
Draft PR until PACs are updated (esp-rs/esp-pacs#130 and esp-rs/esp-pacs#129)