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"Fix" clippy checks in CI, resolve a bunch of clippy warnings #1134

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46 changes: 32 additions & 14 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -709,11 +709,32 @@ jobs:
- uses: dtolnay/rust-toolchain@v1
with:
toolchain: nightly
targets: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
targets: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf # ,riscv32imafc-unknown-none-elf
components: clippy,rust-src
- uses: Swatinem/rust-cache@v2

# Run 'cargo clippy' on all packages targeting RISC-V:
- name: clippy (esp32c2-hal)
run: |
cargo clippy --manifest-path=esp-hal/Cargo.toml --target=riscv32imc-unknown-none-elf --features=esp32c2,xtal-40mhz \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity -A clippy::enum_variant_names -A clippy::field_reassign_with_default
- name: clippy (esp32c3-hal)
run: |
cargo clippy --manifest-path=esp-hal/Cargo.toml --target=riscv32imc-unknown-none-elf --features=esp32c3 \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity -A clippy::enum_variant_names -A clippy::field_reassign_with_default
- name: clippy (esp32c6-hal)
run: |
cargo clippy --manifest-path=esp-hal/Cargo.toml --target=riscv32imac-unknown-none-elf --features=esp32c6 \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity -A clippy::enum_variant_names -A clippy::field_reassign_with_default
- name: clippy (esp32h2-hal)
run: |
cargo clippy --manifest-path=esp-hal/Cargo.toml --target=riscv32imac-unknown-none-elf --features=esp32h2 \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity -A clippy::enum_variant_names -A clippy::field_reassign_with_default
# - name: clippy (esp32p4-hal)
# run: |
# cargo clippy --manifest-path=esp-hal/Cargo.toml --target=riscv32imafc-unknown-none-elf --features=esp32p4 \
# -- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity -A clippy::enum_variant_names -A clippy::field_reassign_with_default

- name: clippy (esp-lp-hal, esp32c6)
run: cd esp-lp-hal && cargo clippy --features=esp32c6 -- -D warnings
- name: clippy (esp-lp-hal, esp32s2)
Expand All @@ -722,16 +743,6 @@ jobs:
run: cd esp-lp-hal && cargo clippy --features=esp32s3 -- -D warnings
- name: clippy (esp-riscv-rt)
run: cd esp-riscv-rt && cargo clippy --target=riscv32imc-unknown-none-elf -- -D warnings
- name: clippy (esp32c2-hal)
run: cd esp32c2-hal && cargo clippy -- -D warnings
- name: clippy (esp32c3-hal)
run: cd esp32c3-hal && cargo clippy -- -D warnings
- name: clippy (esp32c6-hal)
run: cd esp32c6-hal && cargo clippy -- -D warnings
- name: clippy (esp32h2-hal)
run: cd esp32h2-hal && cargo clippy -- -D warnings
- name: clippy (esp32p4-hal)
run: cd esp32p4-hal && cargo clippy -- -D warnings

clippy-xtensa:
runs-on: ubuntu-latest
Expand All @@ -740,16 +751,23 @@ jobs:
- uses: actions/checkout@v4
- uses: esp-rs/xtensa-toolchain@v1.5
with:
default: true
ldproxy: false
- uses: Swatinem/rust-cache@v2

# Run 'cargo clippy' on all packages targeting Xtensa:
- name: clippy (esp32-hal)
run: cd esp32-hal && cargo clippy -- -D warnings
run: |
cargo clippy -Zbuild-std=core --manifest-path=esp-hal/Cargo.toml --target=xtensa-esp32-none-elf --features=esp32,xtal-40mhz \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity
- name: clippy (esp32s2-hal)
run: cd esp32s2-hal && cargo clippy -- -D warnings
run: |
cargo clippy -Zbuild-std=core --manifest-path=esp-hal/Cargo.toml --target=xtensa-esp32s2-none-elf --features=esp32s2 \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity
- name: clippy (esp32s3-hal)
run: cd esp32s3-hal && cargo clippy -- -D warnings
run: |
cargo clippy -Zbuild-std=core --manifest-path=esp-hal/Cargo.toml --target=xtensa-esp32s3-none-elf --features=esp32s3 \
-- -D warnings -A clippy::too_many_arguments -A clippy::type_complexity

rustfmt:
runs-on: ubuntu-latest
Expand Down
38 changes: 17 additions & 21 deletions esp-hal/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -178,8 +178,8 @@ fn main() -> Result<(), Box<dyn Error>> {
}

// Don't support "interrupt-preemption" and "direct-vectoring" on Xtensa and
// RISCV-clic
if (*&device.symbols.contains(&String::from("clic")) || device.arch == Arch::Xtensa)
// RISC-V with CLIC:
if (device.symbols.contains(&String::from("clic")) || device.arch == Arch::Xtensa)
&& (cfg!(feature = "direct-vectoring") || cfg!(feature = "interrupt-preemption"))
{
panic!("The target does not support interrupt-preemption and direct-vectoring");
Expand Down Expand Up @@ -290,7 +290,7 @@ fn copy_dir_all(

/// A naive pre-processor for linker scripts
fn preprocess_file(
config: &Vec<&str>,
config: &[&str],
src: impl AsRef<Path>,
dst: impl AsRef<Path>,
) -> std::io::Result<()> {
Expand All @@ -304,15 +304,15 @@ fn preprocess_file(
let line = line?;
let trimmed = line.trim();

if trimmed.starts_with("#IF ") {
let condition = &trimmed[4..];
let should_take = take.iter().all(|v| *v == true);
if let Some(stripped) = trimmed.strip_prefix("#IF ") {
let condition = stripped;
let should_take = take.iter().all(|v| *v);
let should_take = should_take && config.contains(&condition);
take.push(should_take);
continue;
} else if trimmed == "#ELSE" {
let taken = take.pop().unwrap();
let should_take = take.iter().all(|v| *v == true);
let should_take = take.iter().all(|v| *v);
let should_take = should_take && !taken;
take.push(should_take);
continue;
Expand All @@ -322,8 +322,8 @@ fn preprocess_file(
}

if *take.last().unwrap() {
out_file.write(line.as_bytes())?;
out_file.write(b"\n")?;
out_file.write_all(line.as_bytes())?;
let _ = out_file.write(b"\n")?;
}
}
Ok(())
Expand All @@ -340,15 +340,15 @@ fn gen_efuse_table(device_name: &str, out_dir: impl AsRef<Path>) -> Result<(), B
let mut line = String::with_capacity(128);

while reader.read_line(&mut line)? > 0 {
if line.ends_with("\n") {
if line.ends_with('\n') {
line.pop();
if line.ends_with("\r") {
if line.ends_with('\r') {
line.pop();
}
}
// drop comment and trim
line.truncate(
if let Some((pfx, _cmt)) = line.split_once("#") {
if let Some((pfx, _cmt)) = line.split_once('#') {
pfx
} else {
&line
Expand All @@ -361,9 +361,9 @@ fn gen_efuse_table(device_name: &str, out_dir: impl AsRef<Path>) -> Result<(), B
continue;
}

let mut fields = line.split(",");
let mut fields = line.split(',');
match (
fields.next().map(|s| s.trim().replace(".", "_")),
fields.next().map(|s| s.trim().replace('.', "_")),
fields
.next()
.map(|s| s.trim().replace(|c: char| !c.is_ascii_digit(), "")),
Expand Down Expand Up @@ -404,16 +404,12 @@ fn detect_atomic_extension(ext: &str) -> bool {
// handle that
let target_flags = rustflags
.split(0x1f as char)
.filter(|s| s.starts_with("target-feature="))
.map(|s| s.strip_prefix("target-feature="))
.flatten();
.filter_map(|s| s.strip_prefix("target-feature="));
for tf in target_flags {
let tf = tf
.split(",")
.split(',')
.map(|s| s.trim())
.filter(|s| s.starts_with('+'))
.map(|s| s.strip_prefix('+'))
.flatten();
.filter_map(|s| s.strip_prefix('+'));
for tf in tf {
if tf == ext {
return true;
Expand Down
2 changes: 1 addition & 1 deletion esp-hal/src/aes/esp32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@ impl<'d> Aes<'d> {
pub(super) fn read_block(&self, block: &mut [u8]) {
let text_len = self.aes.text_iter().count();
debug_assert_eq!(block.len(), text_len * ALIGN_SIZE);
Self::read_from_regset(block, text_len, &self.aes.text(0));
Self::read_from_regset(block, text_len, self.aes.text(0));
}
}

Expand Down
4 changes: 2 additions & 2 deletions esp-hal/src/aes/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -140,7 +140,7 @@ impl<'d> Aes<'d> {
pub fn new(aes: impl Peripheral<P = AES> + 'd) -> Self {
crate::into_ref!(aes);
let mut ret = Self {
aes: aes,
aes,
#[cfg(not(esp32))]
alignment_helper: AlignmentHelper::default(),
};
Expand Down Expand Up @@ -440,7 +440,7 @@ pub mod dma {
})
}

fn start_transfer_dma<'w>(
fn start_transfer_dma(
&mut self,
write_buffer_ptr: *const u8,
write_buffer_len: usize,
Expand Down
12 changes: 6 additions & 6 deletions esp-hal/src/analog/adc/calibration/curve.rs
Original file line number Diff line number Diff line change
Expand Up @@ -95,11 +95,11 @@ where
} else {
// err = coeff[0] + coeff[1] * val + coeff[2] * val^2 + ... + coeff[n] * val^n
let mut var = 1i64;
let mut err = (var * self.coeff[0] as i64 / COEFF_MUL) as i32;
let mut err = (var * self.coeff[0] / COEFF_MUL) as i32;

for coeff in &self.coeff[1..] {
var = var * val as i64;
err += (var * *coeff as i64 / COEFF_MUL) as i32;
var *= val as i64;
err += (var * *coeff / COEFF_MUL) as i32;
}

err
Expand Down Expand Up @@ -148,7 +148,7 @@ mod impls {
#[cfg(esp32c3)]
CURVES_COEFFS1 [
Attenuation0dB => [
-0.2259664705000430,
-0.225966470500043,
-0.0007265418501948,
0.0000109410402681,
],
Expand All @@ -158,7 +158,7 @@ mod impls {
0.0000088166562521,
],
Attenuation6dB => [
-1.0178592392364350,
-1.017859239236435,
-0.0097159265299153,
0.0000149794028038,
],
Expand Down Expand Up @@ -215,7 +215,7 @@ mod impls {
0.0000208385525314,
],
Attenuation11dB => [
-0.6444034182694780,
-0.644403418269478,
-0.0644334888647536,
0.0001297891447611,
-0.0000000707697180,
Expand Down
24 changes: 12 additions & 12 deletions esp-hal/src/analog/adc/esp32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ where

AdcPin {
pin,
_phantom: PhantomData::default(),
_phantom: PhantomData,
}
}
}
Expand All @@ -65,7 +65,7 @@ impl<ADCI> Default for AdcConfig<ADCI> {
AdcConfig {
resolution: Resolution::Resolution12Bit,
attenuations: [None; 10],
_phantom: PhantomData::default(),
_phantom: PhantomData,
}
}
}
Expand Down Expand Up @@ -111,7 +111,7 @@ impl RegisterAccess for ADC1 {
fn set_attenuation(channel: usize, attenuation: u8) {
unsafe { &*SENS::ptr() }.sar_atten1().modify(|r, w| {
let new_value = (r.bits() & !(0b11 << (channel * 2)))
| (((attenuation as u8 & 0b11) as u32) << (channel * 2));
| (((attenuation & 0b11) as u32) << (channel * 2));

unsafe { w.sar1_atten().bits(new_value) }
});
Expand Down Expand Up @@ -166,7 +166,7 @@ impl RegisterAccess for ADC1 {
.sar_meas_start1()
.read()
.meas1_data_sar()
.bits() as u16
.bits()
}
}

Expand All @@ -186,7 +186,7 @@ impl RegisterAccess for ADC2 {
fn set_attenuation(channel: usize, attenuation: u8) {
unsafe { &*SENS::ptr() }.sar_atten2().modify(|r, w| {
let new_value = (r.bits() & !(0b11 << (channel * 2)))
| (((attenuation as u8 & 0b11) as u32) << (channel * 2));
| (((attenuation & 0b11) as u32) << (channel * 2));

unsafe { w.sar2_atten().bits(new_value) }
});
Expand Down Expand Up @@ -241,7 +241,7 @@ impl RegisterAccess for ADC2 {
.sar_meas_start2()
.read()
.meas2_data_sar()
.bits() as u16
.bits()
}
}

Expand Down Expand Up @@ -271,9 +271,9 @@ where
// Set attenuation for pins
let attenuations = config.attenuations;

for channel in 0..attenuations.len() {
if let Some(attenuation) = attenuations[channel] {
ADC1::set_attenuation(channel, attenuation as u8);
for (channel, attentuation) in attenuations.iter().enumerate() {
if let Some(attenuation) = attentuation {
ADC1::set_attenuation(channel, *attenuation as u8);
}
}

Expand Down Expand Up @@ -356,7 +356,7 @@ where
fn read(&mut self, _pin: &mut AdcPin<PIN, ADCI>) -> nb::Result<u16, Self::Error> {
use embedded_hal::adc::Channel;

if self.attenuations[AdcPin::<PIN, ADCI>::channel() as usize] == None {
if self.attenuations[AdcPin::<PIN, ADCI>::channel() as usize].is_none() {
panic!(
"Channel {} is not configured reading!",
AdcPin::<PIN, ADCI>::channel()
Expand All @@ -374,7 +374,7 @@ where
// If no conversions are in progress, start a new one for given channel
self.active_channel = Some(AdcPin::<PIN, ADCI>::channel());

ADCI::set_en_pad(AdcPin::<PIN, ADCI>::channel() as u8);
ADCI::set_en_pad(AdcPin::<PIN, ADCI>::channel());

ADCI::clear_start_sar();
ADCI::set_start_sar();
Expand Down Expand Up @@ -414,7 +414,7 @@ macro_rules! impl_adc_interface {
}
}

mod implementation {
mod adc_implementation {
use crate::peripherals::{ADC1, ADC2};

impl_adc_interface! {
Expand Down
4 changes: 1 addition & 3 deletions esp-hal/src/analog/adc/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -84,9 +84,7 @@ pub trait AdcCalScheme<ADCI>: Sized + private::Sealed {
impl private::Sealed for () {}

impl<ADCI> AdcCalScheme<ADCI> for () {
fn new_cal(_atten: Attenuation) -> Self {
()
}
fn new_cal(_atten: Attenuation) -> Self {}
}

/// A helper trait to get access to ADC calibration efuses.
Expand Down
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