Merge pull request #276 from ogamespec/main

PPUSim Dbg_WriteRegister
emu-russia · Feb 9, 2023 · 7646579 · 7646579
2 parents f0654dc + 700a86f
commit 7646579
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Showing 10 changed files with 135 additions and 25 deletions.
diff --git a/BreaksPPU/PPUPlayerInterop/PPUPlayerBoardDebug.cpp b/BreaksPPU/PPUPlayerInterop/PPUPlayerBoardDebug.cpp
@@ -615,11 +615,11 @@ namespace PPUPlayer
 
 	void Board::SetCTRL0(uint8_t val)
 	{
-		ppu->Dbg_SetCTRL0(val);
+		ppu->Dbg_WriteRegister(offsetof(PPUSim::PPU_Registers, CTRL0), val);
 	}
 
 	void Board::SetCTRL1(uint8_t val)
 	{
-		ppu->Dbg_SetCTRL1(val);
+		ppu->Dbg_WriteRegister(offsetof(PPUSim::PPU_Registers, CTRL1), val);
 	}
 }
diff --git a/BreaksPPU/PPUSim/debug.cpp b/BreaksPPU/PPUSim/debug.cpp
@@ -204,14 +204,7 @@ namespace PPUSim
 		regs.CTRL1 = this->regs->Debug_GetCTRL1();	// $2001
 		regs.MainOAMCounter = eval->Debug_GetMainCounter();		// $2003
 		regs.TempOAMCounter = eval->Debug_GetTempCounter();
-
-		TriState ob[8]{};
-		for (size_t n = 0; n < 8; n++)
-		{
-			ob[n] = oam->get_OB(n);
-		}
-		regs.OAMBuffer = Pack(ob);		// $2004
-
+		regs.OAMBuffer = oam->Dbg_Get_OAMBuffer();		// $2004
 		regs.ReadBuffer = vram_ctrl->Debug_GetRB();			// $2007
 		regs.SCC_FH = Pack3(wire.FH);		// $2005/2006
 		regs.SCC_FV = Pack3(wire.FV);
@@ -288,13 +281,53 @@ namespace PPUSim
 		eval->GetDebugInfo(wires);
 	}
 
-	void PPU::Dbg_SetCTRL0(uint8_t val)
+	uint32_t PPU::Dbg_ReadRegister(int ofs)
 	{
-		regs->Debug_SetCTRL0(val);
+		switch (ofs)
+		{
+			case offsetof(PPU_Registers, HCounter): return (uint32_t)h->get();
+			case offsetof(PPU_Registers, VCounter): return (uint32_t)v->get();
+			case offsetof(PPU_Registers, CTRL0): return regs->Debug_GetCTRL0();
+			case offsetof(PPU_Registers, CTRL1): return regs->Debug_GetCTRL1();
+			case offsetof(PPU_Registers, MainOAMCounter): return eval->Debug_GetMainCounter();
+			case offsetof(PPU_Registers, TempOAMCounter): return eval->Debug_GetTempCounter();
+			case offsetof(PPU_Registers, OAMBuffer): return oam->Dbg_Get_OAMBuffer();
+			case offsetof(PPU_Registers, ReadBuffer): return vram_ctrl->Debug_GetRB();
+			case offsetof(PPU_Registers, SCC_FH): return Pack3(wire.FH);
+			case offsetof(PPU_Registers, SCC_FV): return Pack3(wire.FV);
+			case offsetof(PPU_Registers, SCC_NTV): return ToByte(wire.NTV);
+			case offsetof(PPU_Registers, SCC_NTH): return ToByte(wire.NTH);
+			case offsetof(PPU_Registers, SCC_TV): return Pack5(wire.TV);
+			case offsetof(PPU_Registers, SCC_TH): return Pack5(wire.TH);
+
+			default:
+				break;
+		}
+
+		return 0;
 	}
 
-	void PPU::Dbg_SetCTRL1(uint8_t val)
+	void PPU::Dbg_WriteRegister(int ofs, uint32_t val)
 	{
-		regs->Debug_SetCTRL1(val);
+		switch (ofs)
+		{
+			case offsetof(PPU_Registers, HCounter): h->set(val); break;
+			case offsetof(PPU_Registers, VCounter): v->set(val); break;
+			case offsetof(PPU_Registers, CTRL0): regs->Debug_SetCTRL0(val); break;
+			case offsetof(PPU_Registers, CTRL1): regs->Debug_SetCTRL1(val); break;
+			case offsetof(PPU_Registers, MainOAMCounter): eval->Debug_SetMainCounter(val); break;
+			case offsetof(PPU_Registers, TempOAMCounter): eval->Debug_SetTempCounter(val); break;
+			case offsetof(PPU_Registers, OAMBuffer): oam->Dbg_Set_OAMBuffer(val); break;
+			case offsetof(PPU_Registers, ReadBuffer): vram_ctrl->Debug_SetRB(val); break;
+			case offsetof(PPU_Registers, SCC_FH): break;
+			case offsetof(PPU_Registers, SCC_FV): break;
+			case offsetof(PPU_Registers, SCC_NTV): break;
+			case offsetof(PPU_Registers, SCC_NTH): break;
+			case offsetof(PPU_Registers, SCC_TV): break;
+			case offsetof(PPU_Registers, SCC_TH): break;
+
+			default:
+				break;
+		}
 	}
 }
diff --git a/BreaksPPU/PPUSim/oam.cpp b/BreaksPPU/PPUSim/oam.cpp
@@ -462,4 +462,24 @@ namespace PPUSim
 			lane->sim(column, bit_num, val_out);
 		}
 	}
+
+	uint32_t OAM::Dbg_Get_OAMBuffer()
+	{
+		TriState val_lo[8]{};
+		for (size_t n = 0; n < 8; n++)
+		{
+			val_lo[n] = get_OB(n);
+		}
+		return Pack(val_lo);
+	}
+
+	void OAM::Dbg_Set_OAMBuffer(uint32_t value)
+	{
+		TriState val_lo[8]{};
+		Unpack(value, val_lo);
+		for (size_t n = 0; n < 8; n++)
+		{
+			set_OB(n, val_lo[n]);
+		}
+	}
 }
diff --git a/BreaksPPU/PPUSim/oam.h b/BreaksPPU/PPUSim/oam.h
@@ -144,5 +144,8 @@ namespace PPUSim
 
 		void SetOamDecayBehavior(OAMDecayBehavior behavior);
 		OAMDecayBehavior GetOamDecayBehavior();
+
+		uint32_t Dbg_Get_OAMBuffer();
+		void Dbg_Set_OAMBuffer(uint32_t value);
 	};
 }
diff --git a/BreaksPPU/PPUSim/pch.h b/BreaksPPU/PPUSim/pch.h
@@ -6,6 +6,7 @@
 #include <random>
 #include <algorithm>
 #include <intrin.h>
+#include <cstddef>
 
 #pragma warning(disable: 26812)		// warning C26812: The enum type 'BaseLogic::TriState' is unscoped. Prefer 'enum class' over 'enum' (Enum.3).
 

diff --git a/BreaksPPU/PPUSim/ppu.h b/BreaksPPU/PPUSim/ppu.h
@@ -482,7 +482,8 @@ namespace PPUSim
 		uint8_t Dbg_GetCRAMAddress();
 		uint16_t Dbg_GetPPUAddress();
 		void Dbg_RenderAlwaysEnabled(bool enable);
-		void Dbg_SetCTRL0(uint8_t val);
-		void Dbg_SetCTRL1(uint8_t val);
+
+		uint32_t Dbg_ReadRegister(int ofs);
+		void Dbg_WriteRegister(int ofs, uint32_t val);
 	};
 }
diff --git a/BreaksPPU/PPUSim/sprite_eval.cpp b/BreaksPPU/PPUSim/sprite_eval.cpp
@@ -370,6 +370,16 @@ namespace PPUSim
 		return carry_out;
 	}
 
+	TriState OAMCounterBit::get()
+	{
+		return keep_ff.get();
+	}
+
+	void OAMCounterBit::set(TriState value)
+	{
+		keep_ff.set(value);
+	}
+
 	TriState OAMCmprBit::sim (
 		TriState OB_Even,
 		TriState V_Even,
@@ -425,26 +435,45 @@ namespace PPUSim
 
 	uint32_t OAMEval::Debug_GetMainCounter()
 	{
-		uint32_t val = 0;
-
+		TriState val_lo[8]{};
 		for (size_t n = 0; n < 8; n++)
 		{
-			val |= (OAM_x[n] == TriState::One ? 1ULL : 0) << n;
+			val_lo[n] = MainCounter[n].get();
 		}
-
-		return val;
+		return Pack(val_lo);
 	}
 
 	uint32_t OAMEval::Debug_GetTempCounter()
 	{
-		uint32_t val = 0;
-
+		TriState val_lo[8]{};
 		for (size_t n = 0; n < 5; n++)
 		{
-			val |= (OAM_Temp[n] == TriState::One ? 1ULL : 0) << n;
+			val_lo[n] = TempCounter[n].get();
+		}
+		val_lo[5] = TriState::Zero;
+		val_lo[6] = TriState::Zero;
+		val_lo[7] = TriState::Zero;
+		return Pack(val_lo);
+	}
+
+	void OAMEval::Debug_SetMainCounter(uint32_t value)
+	{
+		TriState val_lo[8]{};
+		Unpack(value, val_lo);
+		for (size_t n = 0; n < 8; n++)
+		{
+			MainCounter[n].set(val_lo[n]);
 		}
+	}
 
-		return val;
+	void OAMEval::Debug_SetTempCounter(uint32_t value)
+	{
+		TriState val_lo[8]{};
+		Unpack(value, val_lo);
+		for (size_t n = 0; n < 5; n++)
+		{
+			TempCounter[n].set(val_lo[n]);
+		}
 	}
 
 	void OAMEval::GetDebugInfo(OAMEvalWires& wires)

diff --git a/BreaksPPU/PPUSim/sprite_eval.h b/BreaksPPU/PPUSim/sprite_eval.h
@@ -20,6 +20,9 @@ namespace PPUSim
 			BaseLogic::TriState carry_in,
 			BaseLogic::TriState & val_out,
 			BaseLogic::TriState & n_val_out );
+
+		BaseLogic::TriState get();
+		void set(BaseLogic::TriState value);
 	};
 
 	class OAMCmprBit
@@ -132,6 +135,9 @@ namespace PPUSim
 		uint32_t Debug_GetMainCounter();
 		uint32_t Debug_GetTempCounter();
 
+		void Debug_SetMainCounter(uint32_t value);
+		void Debug_SetTempCounter(uint32_t value);
+
 		void GetDebugInfo(OAMEvalWires& wires);
 	};
 }
diff --git a/BreaksPPU/PPUSim/vram_ctrl.cpp b/BreaksPPU/PPUSim/vram_ctrl.cpp
@@ -131,6 +131,11 @@ namespace PPUSim
 		return ff.get();
 	}
 
+	void RB_Bit::set(TriState value)
+	{
+		ff.set(value);
+	}
+
 	uint8_t VRAM_Control::Debug_GetRB()
 	{
 		uint8_t val = 0;
@@ -142,4 +147,14 @@ namespace PPUSim
 
 		return val;
 	}
+
+	void VRAM_Control::Debug_SetRB(uint8_t value)
+	{
+		TriState val_lo[8]{};
+		Unpack(value, val_lo);
+		for (size_t n = 0; n < 8; n++)
+		{
+			RB[n]->set(val_lo[n]);
+		}
+	}
 }
diff --git a/BreaksPPU/PPUSim/vram_ctrl.h b/BreaksPPU/PPUSim/vram_ctrl.h
@@ -17,6 +17,7 @@ namespace PPUSim
 		void sim(size_t bit_num);
 
 		BaseLogic::TriState get();
+		void set(BaseLogic::TriState value);
 	};
 
 	class VRAM_Control
@@ -63,5 +64,6 @@ namespace PPUSim
 		void sim_ReadBuffer();
 
 		uint8_t Debug_GetRB();
+		void Debug_SetRB(uint8_t value);
 	};
 }