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platform: add Radxa ROCK 5A platform support
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Signed-off-by: Nascs <nascs@radxa.com>
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nascs authored and tingleby committed Sep 27, 2023
1 parent 200c0a0 commit 7a45f17
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1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -45,6 +45,7 @@ ARM
* [phyBOARD-Wega](../master/docs/phyboard-wega.md)
* [96Boards](../master/docs/96boards.md)
* [ADLINK IPi-SMARC ARM](../master/docs/adlink_ipi_arm.md)
* [Radxa ROCK 5A](../mraa//docs/radxa_rock_5a.md)
* [Rock Pi 4](../master/docs/rockpi4.md)

MIPS
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35 changes: 35 additions & 0 deletions api/mraa/types.h
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Expand Up @@ -71,6 +71,7 @@ typedef enum {
MRAA_SIEMENS_IOT2050 = 26, /**< Siemens IOT2050 board */
MRAA_RADXA_ROCK_3C = 27, /**< Radxa ROCK 3 Model C */
MRAA_VISIONFIVE = 28, /**< StarFive VisionFive board */
MRAA_RADXA_ROCK_5A = 29, /**< Radxa ROCK 5 Model A */

// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
Expand Down Expand Up @@ -178,6 +179,40 @@ typedef enum {
MRAA_INTEL_EDISON_GP81 = 55
} mraa_intel_edison_t;

/**
* Radxa ROCK 5 Model A GPIO numbering enum
*/
typedef enum {
MRAA_RADXA_ROCK_5A_PIN3 = 3,
MRAA_RADXA_ROCK_5A_PIN5 = 5,
MRAA_RADXA_ROCK_5A_PIN7 = 7,
MRAA_RADXA_ROCK_5A_PIN8 = 8,
MRAA_RADXA_ROCK_5A_PIN10 = 10,
MRAA_RADXA_ROCK_5A_PIN11 = 11,
MRAA_RADXA_ROCK_5A_PIN12 = 12,
MRAA_RADXA_ROCK_5A_PIN13 = 13,
MRAA_RADXA_ROCK_5A_PIN15 = 15,
MRAA_RADXA_ROCK_5A_PIN16 = 16,
MRAA_RADXA_ROCK_5A_PIN18 = 18,
MRAA_RADXA_ROCK_5A_PIN19 = 19,
MRAA_RADXA_ROCK_5A_PIN21 = 21,
MRAA_RADXA_ROCK_5A_PIN22 = 22,
MRAA_RADXA_ROCK_5A_PIN23 = 23,
MRAA_RADXA_ROCK_5A_PIN24 = 24,
MRAA_RADXA_ROCK_5A_PIN26 = 26,
MRAA_RADXA_ROCK_5A_PIN27 = 27,
MRAA_RADXA_ROCK_5A_PIN28 = 28,
MRAA_RADXA_ROCK_5A_PIN29 = 29,
MRAA_RADXA_ROCK_5A_PIN31 = 31,
MRAA_RADXA_ROCK_5A_PIN32 = 32,
MRAA_RADXA_ROCK_5A_PIN33 = 33,
MRAA_RADXA_ROCK_5A_PIN35 = 35,
MRAA_RADXA_ROCK_5A_PIN36 = 36,
MRAA_RADXA_ROCK_5A_PIN37 = 37,
MRAA_RADXA_ROCK_5A_PIN38 = 38,
MRAA_RADXA_ROCK_5A_PIN40 = 40
} mraa_radxa_rock_5a_wiring_t;

/**
* Radxa ROCK 3 Model C GPIO numbering enum
*/
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35 changes: 35 additions & 0 deletions api/mraa/types.hpp
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Expand Up @@ -65,6 +65,7 @@ typedef enum {
SIEMENS_IOT2050 = 26, /**< Siemens IOT2050 board */
RADXA_ROCK_3C = 27, /**< Radxa ROCK 3 Model C */
VISIONFIVE = 28, /**< StarFive VisionFive board */
RADXA_ROCK_5A = 29, /**< Radxa ROCK 5 Model A */

FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */

Expand Down Expand Up @@ -169,6 +170,40 @@ typedef enum {
INTEL_EDISON_GP81 = 55
} IntelEdison;

/**
* Radxa ROCK 5 Model A GPIO numbering enum
*/
typedef enum {
RADXA_ROCK_5A_PIN3 = 3,
RADXA_ROCK_5A_PIN5 = 5,
RADXA_ROCK_5A_PIN7 = 7,
RADXA_ROCK_5A_PIN8 = 8,
RADXA_ROCK_5A_PIN10 = 10,
RADXA_ROCK_5A_PIN11 = 11,
RADXA_ROCK_5A_PIN12 = 12,
RADXA_ROCK_5A_PIN13 = 13,
RADXA_ROCK_5A_PIN15 = 15,
RADXA_ROCK_5A_PIN16 = 16,
RADXA_ROCK_5A_PIN18 = 18,
RADXA_ROCK_5A_PIN19 = 19,
RADXA_ROCK_5A_PIN21 = 21,
RADXA_ROCK_5A_PIN22 = 22,
RADXA_ROCK_5A_PIN23 = 23,
RADXA_ROCK_5A_PIN24 = 24,
RADXA_ROCK_5A_PIN26 = 26,
RADXA_ROCK_5A_PIN27 = 27,
RADXA_ROCK_5A_PIN28 = 28,
RADXA_ROCK_5A_PIN29 = 29,
RADXA_ROCK_5A_PIN31 = 31,
RADXA_ROCK_5A_PIN32 = 32,
RADXA_ROCK_5A_PIN33 = 33,
RADXA_ROCK_5A_PIN35 = 35,
RADXA_ROCK_5A_PIN36 = 36,
RADXA_ROCK_5A_PIN37 = 37,
RADXA_ROCK_5A_PIN38 = 38,
RADXA_ROCK_5A_PIN40 = 40
} RadxaRock5AWiring;

/**
* Radxa ROCK 3 Model C GPIO numbering enum
*/
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47 changes: 47 additions & 0 deletions docs/radxa_rock_5a.md
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Radxa ROCK 5 Model A {#_Radxa}
====================

Radxa ROCK 5A is a Rockchip RK3588s based SBC(Single Board Computer) by Radxa. It can run android or some Linux distributions. Radxa ROCK 5A features a eight core ARM processor, 64bit dual channel 3200Mb/s LPDDR4, up to 8Kp60 HDMI, MIPI DSI, MIPI CSI, 3.5mm jack with mic, 802.11 ac WIFI, Bluetooth 5.0, USB Port, GbE LAN, 40-pin color expansion header, RTC. Also, Radxa ROCK 5A supports USB PD and QC powering.

Interface notes
---------------

- UART2 is enabled as the default console.
- All UART ports support baud up to 1500000.

Pin Mapping
-----------

Radxa ROCK 5A has a 40-pin expansion header. Each pin is distinguished by color.

|Function4 |Function3 |Function2 |Function1 | | PIN | PIN | Function1| Function2| Function3|
|------------|------------|------------|-----------|:------|------:|---------|------------|-----------|------------|
| | | |+3.3V | 1 | 2 | +5.0V| | | |
| |PWM15_IR_M3 |I2C8_SDA_M2 |GPIO1_D7 | 3 | 4 | +5.0V| UART2_TX_M0|I2C1_SCL_M0| |
| |PWM14_M2 |I2C8_SCL_M2 |GPIO1_D6 | 5 | 6 | GND| UART2_RX_M0|I2C1_SDA_M0| |
| |UART4_TX_M2 |SPI0_CLK_M2 |GPIO1_B3 | 7 | 8 | GPIO0_B5|SPI0_MOSI_M1| | |
| | | |GND | 9 | 10 | GPIO0_B6| | | |
| |PWM15_IR_M1 |I2C7_SDA_M3 |GPIO4_B3 | 11 | 12 | GPIO4_A1| | | |
|PWM14_M1 |SPI0_CS0_M1 |I2C7_SCL_M3 |GPIO4_B2 | 13 | 14 | GND| | | |
| |PWM11_IR_M1 |UART9_TX_M1 |GPIO4_B4 | 15 | 16 | GPIO1_A5|SPI2_MOSI_M0| | |
| | | |+3.3 | 17 | 18 | GPIO1_B0| SPI2_CS1_M0| | |
|UART6_TX_M1 |SPI4_MOSI_M2|I2C2_SCL_M4 |GPIO1_A1 | 19 | 20 | GND| | | |
|UART6_RX_M1 |SPI4_MISO_M2|I2C2_SDA_M4 |GPIO1_A0 | 21 | 22 | GPIO1_B5| SPI0_CS1_M2|UART7_TX_M2| |
|PWM0_M2 |SPI4_CLK_M2 |I2C4_SDA_M3 |GPIO1_A2 | 23 | 24 | GPIO1_A3| I2C4_SCL_M3|SPI4_CS0_M2| PWM1_M2|
| | | | GND | 25 | 26 | GPIO1_A4|SPI2_MISO_M0| | |
|SPI0_MISO_M0|I2C6_SDA_M0 |PWM6_M0 |GPIO0_C7 | 27 | 28 | GPIO0_D0| PWM7_IR_M0|I2C6_SCL_M0|SPI3_MISO_M2|
| |UART4_RX_M2 |SPI0_MOSI_M |GPIO1_B2 | 29 | 30 | GND| | | |
| | |SPI0_MISO_M2|GPIO1_B1 | 31 | 32 | GPIO4_B0| I2C6_SDA_M3|SPI2_CS1_M1| UART8_TX_M0|
| |UART7_RX_M2 |SPI0_CS0_M2 |GPIO1_B4 | 33 | 34 | GND| | | |
| | |SPI0_MISO_M1|GPIO4_A0 | 35 | 36 | GPIO4_A2| SPI0_CLK_M1| | |
| | | |SARADC_VIN2| 37 | 38 | GPIO4_A5| I2C3_SDA_M2|UART3_TX_M2| |
| | | |GND | 39 | 40 | GPIO4_B1| I2C6_SCL_M3|SPI0_CS1_M1| UART8_RX_M0|

Resources
---------

You can find additional product support in the following channels:

- [Product Info](https://docs.radxa.com/en/rock5/rock5a)
- [Forums](https://forum.radxa.com/c/rock5)
- [Github](https://github.com/radxa)
30 changes: 30 additions & 0 deletions include/arm/radxa_rock_5a.h
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/*
* Author: Nascs <nascs@radxa.com>
* Copyright (c) Radxa Limited.
*
* SPDX-License-Identifier: MIT
*/

#pragma once

#ifdef __cplusplus
extern "C" {
#endif

#include "mraa_internal.h"

#define MRAA_RADXA_ROCK_5A_GPIO_COUNT 27
#define MRAA_RADXA_ROCK_5A_I2C_COUNT 5
#define MRAA_RADXA_ROCK_5A_SPI_COUNT 2
#define MRAA_RADXA_ROCK_5A_UART_COUNT 5
#define MRAA_RADXA_ROCK_5A_PWM_COUNT 9
#define MRAA_RADXA_ROCK_5A_AIO_COUNT 1
#define MRAA_RADXA_ROCK_5A_PIN_COUNT 40
#define PLATFORM_NAME_RADXA_ROCK_5A "Radxa ROCK 5A"

mraa_board_t *
mraa_radxa_rock_5a();

#ifdef __cplusplus
}
#endif
1 change: 1 addition & 0 deletions src/CMakeLists.txt
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Expand Up @@ -108,6 +108,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/arm/banana.c
${PROJECT_SOURCE_DIR}/src/arm/de_nano_soc.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3c.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5a.c
${PROJECT_SOURCE_DIR}/src/arm/rockpi4.c
${PROJECT_SOURCE_DIR}/src/arm/adlink_ipi.c
${PROJECT_SOURCE_DIR}/src/arm/siemens/iot2050.c
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6 changes: 6 additions & 0 deletions src/arm/arm.c
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Expand Up @@ -11,6 +11,7 @@

#include "arm/96boards.h"
#include "arm/radxa_rock_3c.h"
#include "arm/radxa_rock_5a.h"
#include "arm/rockpi4.h"
#include "arm/de_nano_soc.h"
#include "arm/banana.h"
Expand Down Expand Up @@ -94,6 +95,8 @@ mraa_arm_platform()
platform_type = MRAA_96BOARDS;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_3C))
platform_type = MRAA_RADXA_ROCK_3C;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_5A))
platform_type = MRAA_RADXA_ROCK_5A;
else if (mraa_file_contains("/proc/device-tree/model", "ROCK Pi 4") ||
mraa_file_contains("/proc/device-tree/model", "ROCK PI 4") ||
mraa_file_contains("/proc/device-tree/model", "ROCK 4")
Expand Down Expand Up @@ -126,6 +129,9 @@ mraa_arm_platform()
case MRAA_RADXA_ROCK_3C:
plat = mraa_radxa_rock_3c();
break;
case MRAA_RADXA_ROCK_5A:
plat = mraa_radxa_rock_5a();
break;
case MRAA_ROCKPI4:
plat = mraa_rockpi4();
break;
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