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AArch64: Add some variants of vector compare instructions
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This commit adds vector compare equal instructions for 64-bit vectors
on aarch64 codegen.

Signed-off-by: Akira Saitoh <saiaki@jp.ibm.com>
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Akira Saitoh committed Dec 13, 2023
1 parent 149b524 commit d4b7e50
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Showing 4 changed files with 55 additions and 1 deletion.
6 changes: 6 additions & 0 deletions compiler/aarch64/codegen/ARM64Debug.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -787,12 +787,18 @@ static const char *opCodeToNameMap[] =
"vshll2_4s",
"vshll2_2d",
"vcmeq16b",
"vcmeq8b",
"vcmeq8h",
"vcmeq4h",
"vcmeq4s",
"vcmeq2s",
"vcmeq2d",
"vcmeq16b_zero",
"vcmeq8b_zero",
"vcmeq8h_zero",
"vcmeq4h_zero",
"vcmeq4s_zero",
"vcmeq2s_zero",
"vcmeq2d_zero",
"vcmhs16b",
"vcmhs8h",
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6 changes: 6 additions & 0 deletions compiler/aarch64/codegen/OMRInstOpCode.enum
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Original file line number Diff line number Diff line change
Expand Up @@ -770,12 +770,18 @@
vshll2_2d, /* 0x6EA13800, SHLL2 */
/* Vector Compare */
vcmeq16b, /* 0x6E208C00, CMEQ */
vcmeq8b, /* 0x2E208C00, CMEQ */
vcmeq8h, /* 0x6E608C00, CMEQ */
vcmeq4h, /* 0x2E608C00, CMEQ */
vcmeq4s, /* 0x6EA08C00, CMEQ */
vcmeq2s, /* 0x2EA08C00, CMEQ */
vcmeq2d, /* 0x6EE08C00, CMEQ */
vcmeq16b_zero, /* 0x4E209800, CMEQ */
vcmeq8b_zero, /* 0x0E209800, CMEQ */
vcmeq8h_zero, /* 0x4E609800, CMEQ */
vcmeq4h_zero, /* 0x0E609800, CMEQ */
vcmeq4s_zero, /* 0x4EA09800, CMEQ */
vcmeq2s_zero, /* 0x0EA09800, CMEQ */
vcmeq2d_zero, /* 0x4EE09800, CMEQ */
vcmhs16b, /* 0x6E203C00, CMHS */
vcmhs8h, /* 0x6E603C00, CMHS */
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8 changes: 7 additions & 1 deletion compiler/aarch64/codegen/OpBinary.cpp
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Expand Up @@ -771,12 +771,18 @@ const OMR::ARM64::InstOpCode::OpCodeBinaryEntry OMR::ARM64::InstOpCode::binaryEn
0x6EA13800, /* SHLL2 vshll2_2d */
/* Vector Compare */
0x6E208C00, /* CMEQ vcmeq16b */
0x6E608C00, /* CMEQ vcmeq8b */
0x2E208C00, /* CMEQ vcmeq8b */
0x6E608C00, /* CMEQ vcmeq8h */
0x2E608C00, /* CMEQ vcmeq4h */
0x6EA08C00, /* CMEQ vcmeq4s */
0x2EA08C00, /* CMEQ vcmeq2s */
0x6EE08C00, /* CMEQ vcmeq2d */
0x4E209800, /* CMEQ vcmeq16b_zero */
0x0E209800, /* CMEQ vcmeq8b_zero */
0x4E609800, /* CMEQ vcmeq8h_zero */
0x0E609800, /* CMEQ vcmeq4h_zero */
0x4EA09800, /* CMEQ vcmeq4s_zero */
0x0EA09800, /* CMEQ vcmeq2s_zero */
0x4EE09800, /* CMEQ vcmeq2d_zero */
0x6E203C00, /* CMHS vcmhs16b */
0x6E603C00, /* CMHS vcmhs8h */
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36 changes: 36 additions & 0 deletions fvtest/compilerunittest/aarch64/BinaryEncoder.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -840,6 +840,27 @@ INSTANTIATE_TEST_CASE_P(VectorCMP3, ARM64Trg1Src2EncodingTest, ::testing::Values
std::make_tuple(TR::InstOpCode::vcmtst2d, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "4eff8c00")
));

INSTANTIATE_TEST_CASE_P(VectorCMP4, ARM64Trg1Src2EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vcmeq8b, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "2e208c0f"),
std::make_tuple(TR::InstOpCode::vcmeq8b, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "2e208c1f"),
std::make_tuple(TR::InstOpCode::vcmeq8b, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "2e208de0"),
std::make_tuple(TR::InstOpCode::vcmeq8b, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "2e208fe0"),
std::make_tuple(TR::InstOpCode::vcmeq8b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "2e2f8c00"),
std::make_tuple(TR::InstOpCode::vcmeq8b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "2e3f8c00"),
std::make_tuple(TR::InstOpCode::vcmeq4h, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "2e608c0f"),
std::make_tuple(TR::InstOpCode::vcmeq4h, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "2e608c1f"),
std::make_tuple(TR::InstOpCode::vcmeq4h, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "2e608de0"),
std::make_tuple(TR::InstOpCode::vcmeq4h, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "2e608fe0"),
std::make_tuple(TR::InstOpCode::vcmeq4h, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "2e6f8c00"),
std::make_tuple(TR::InstOpCode::vcmeq4h, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "2e7f8c00"),
std::make_tuple(TR::InstOpCode::vcmeq2s, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "2ea08c0f"),
std::make_tuple(TR::InstOpCode::vcmeq2s, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "2ea08c1f"),
std::make_tuple(TR::InstOpCode::vcmeq2s, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "2ea08de0"),
std::make_tuple(TR::InstOpCode::vcmeq2s, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "2ea08fe0"),
std::make_tuple(TR::InstOpCode::vcmeq2s, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "2eaf8c00"),
std::make_tuple(TR::InstOpCode::vcmeq2s, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "2ebf8c00")
));

INSTANTIATE_TEST_CASE_P(VectorCMPZERO1, ARM64Trg1Src1EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vcmeq16b_zero, TR::RealRegister::v15, TR::RealRegister::v0, "4e20980f"),
std::make_tuple(TR::InstOpCode::vcmeq16b_zero, TR::RealRegister::v31, TR::RealRegister::v0, "4e20981f"),
Expand Down Expand Up @@ -926,6 +947,21 @@ INSTANTIATE_TEST_CASE_P(VectorCMPZERO2, ARM64Trg1Src1EncodingTest, ::testing::Va
std::make_tuple(TR::InstOpCode::vcmlt2d_zero, TR::RealRegister::v0, TR::RealRegister::v31, "4ee0abe0")
));

INSTANTIATE_TEST_CASE_P(VectorCMPZERO3, ARM64Trg1Src1EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vcmeq8b_zero, TR::RealRegister::v15, TR::RealRegister::v0, "0e20980f"),
std::make_tuple(TR::InstOpCode::vcmeq8b_zero, TR::RealRegister::v31, TR::RealRegister::v0, "0e20981f"),
std::make_tuple(TR::InstOpCode::vcmeq8b_zero, TR::RealRegister::v0, TR::RealRegister::v15, "0e2099e0"),
std::make_tuple(TR::InstOpCode::vcmeq8b_zero, TR::RealRegister::v0, TR::RealRegister::v31, "0e209be0"),
std::make_tuple(TR::InstOpCode::vcmeq4h_zero, TR::RealRegister::v15, TR::RealRegister::v0, "0e60980f"),
std::make_tuple(TR::InstOpCode::vcmeq4h_zero, TR::RealRegister::v31, TR::RealRegister::v0, "0e60981f"),
std::make_tuple(TR::InstOpCode::vcmeq4h_zero, TR::RealRegister::v0, TR::RealRegister::v15, "0e6099e0"),
std::make_tuple(TR::InstOpCode::vcmeq4h_zero, TR::RealRegister::v0, TR::RealRegister::v31, "0e609be0"),
std::make_tuple(TR::InstOpCode::vcmeq2s_zero, TR::RealRegister::v15, TR::RealRegister::v0, "0ea0980f"),
std::make_tuple(TR::InstOpCode::vcmeq2s_zero, TR::RealRegister::v31, TR::RealRegister::v0, "0ea0981f"),
std::make_tuple(TR::InstOpCode::vcmeq2s_zero, TR::RealRegister::v0, TR::RealRegister::v15, "0ea099e0"),
std::make_tuple(TR::InstOpCode::vcmeq2s_zero, TR::RealRegister::v0, TR::RealRegister::v31, "0ea09be0")
));

INSTANTIATE_TEST_CASE_P(VectorFCMP0, ARM64Trg1Src2EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vfcmeq4s, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "4e20e40f"),
std::make_tuple(TR::InstOpCode::vfcmeq4s, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "4e20e41f"),
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