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Merge pull request #5165 from fjeremic/9428-cleanup-options
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Consolidate all trace CG options
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0xdaryl authored May 11, 2020
2 parents ce2c876 + b4053f0 commit b8634d5
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Showing 32 changed files with 77 additions and 442 deletions.
2 changes: 1 addition & 1 deletion compiler/aarch64/codegen/OMRCodeGenerator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -123,7 +123,7 @@ OMR::ARM64::CodeGenerator::CodeGenerator() :
for (i = 0; i < linkageProperties.getNumFloatArgRegs(); i++)
_fprLinkageGlobalRegisterNumbers[i] = globalRegNumbers[linkageProperties.getFloatArgumentRegister(i)];

if (self()->comp()->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (self()->comp()->getOption(TR_TraceRA))
{
self()->setGPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstGPR, TR::RealRegister::LastGPR));
self()->setFPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstFPR, TR::RealRegister::LastFPR));
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2 changes: 1 addition & 1 deletion compiler/arm/codegen/OMRCodeGenerator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -219,7 +219,7 @@ OMR::ARM::CodeGenerator::CodeGenerator()
for (i=0; i < linkageProperties.getNumFloatArgRegs(); i++)
_fprLinkageGlobalRegisterNumbers[i] = globalRegNumbers[linkageProperties.getFloatArgumentRegister(i)];

if (self()->comp()->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (self()->comp()->getOption(TR_TraceRA))
{
self()->setGPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstGPR, TR::RealRegister::LastGPR));
self()->setFPRegisterIterator(new (self()->trHeapMemory()) TR::RegisterIterator(self()->machine(), TR::RealRegister::FirstFPR, TR::RealRegister::LastFPR));
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4 changes: 2 additions & 2 deletions compiler/arm/codegen/OMRInstruction.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -347,7 +347,7 @@ void TR::ARMLabelInstruction::assignRegisters(TR_RegisterKinds kindToBeAssigned)
//
// This label is the end of the hot instruction stream (i.e., the fallthru path).
//
if (comp->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (comp->getOption(TR_TraceRA))
traceMsg (comp,"\nOOL: 1. Taking register state snap shot\n");
cg()->setIsOutOfLineHotPath(true);
machine->takeRegisterStateSnapShot();
Expand All @@ -366,7 +366,7 @@ void TR::ARMLabelInstruction::assignRegisters(TR_RegisterKinds kindToBeAssigned)
//
// Start RA for OOL cold path, restore register state from snap shot
//
if (comp->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (comp->getOption(TR_TraceRA))
traceMsg (comp, "\nOOL: 1. Restoring Register state from snap shot\n");
cg()->setIsOutOfLineHotPath(false);
machine->restoreRegisterStateFromSnapShot();
Expand Down
8 changes: 4 additions & 4 deletions compiler/arm/codegen/OMRMachine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1023,7 +1023,7 @@ OMR::ARM::Machine::takeRegisterStateSnapShot()
_registerStatesSnapShot[i] = _registerFile[i]->getState();
_assignedRegisterSnapShot[i] = _registerFile[i]->getAssignedRegister();
_registerFlagsSnapShot[i] = _registerFile[i]->getFlags();
if (comp->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (comp->getOption(TR_TraceRA))
traceMsg(comp,"OOL: Taking snap shot %d, %x, %x, %x\n", i, _registerStatesSnapShot[i], _assignedRegisterSnapShot[i], _registerFlagsSnapShot[i]);
}
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
Expand All @@ -1033,7 +1033,7 @@ OMR::ARM::Machine::takeRegisterStateSnapShot()
_registerStatesSnapShot[i] = _registerFile[i]->getState();
_assignedRegisterSnapShot[i] = _registerFile[i]->getAssignedRegister();
_registerFlagsSnapShot[i] = _registerFile[i]->getFlags();
if (comp->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (comp->getOption(TR_TraceRA))
traceMsg(comp,"OOL: Taking snap shot %d, %x, %x, %x\n", i, _registerStatesSnapShot[i], _assignedRegisterSnapShot[i], _registerFlagsSnapShot[i]);
}
#endif
Expand Down Expand Up @@ -1064,7 +1064,7 @@ OMR::ARM::Machine::restoreRegisterStateFromSnapShot()
{
_registerFile[i]->getAssignedRegister()->setAssignedRegister(_registerFile[i]);
}
if (comp->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (comp->getOption(TR_TraceRA))
traceMsg(comp,"OOL: Restoring snap shot %d, %x, %x, %x\n", i, _registerFile[i]->getState(), _registerFile[i]->getAssignedRegister(), _registerFile[i]->getFlags());
}
#if (defined(__VFP_FP__) && !defined(__SOFTFP__))
Expand All @@ -1087,7 +1087,7 @@ OMR::ARM::Machine::restoreRegisterStateFromSnapShot()
{
_registerFile[i]->getAssignedRegister()->setAssignedRegister(_registerFile[i]);
}
if (comp->getOptions()->getRegisterAssignmentTraceOption(TR_TraceRARegisterStates))
if (comp->getOption(TR_TraceRA))
traceMsg(comp,"OOL: Restoring snap shot %d, %x, %x, %x\n", i, _registerFile[i]->getState(), _registerFile[i]->getAssignedRegister(), _registerFile[i]->getFlags());
}
#endif
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30 changes: 15 additions & 15 deletions compiler/codegen/CodeGenRA.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -456,7 +456,7 @@ OMR::CodeGenerator::allocateSpill(int32_t dataSize, bool containsCollectedRefere
TR_ASSERT_FATAL(dataSize <= 16, "assertion failure");
TR_ASSERT_FATAL(!containsCollectedReference || (dataSize == TR::Compiler->om.sizeofReferenceAddress()), "assertion failure");

if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\nallocateSpill(%d, %s, %s)", dataSize, containsCollectedReference? "collected":"uncollected", offset? "offset":"NULL");

if (offset && self()->comp()->getOption(TR_DisableHalfSlotSpills))
Expand Down Expand Up @@ -495,7 +495,7 @@ OMR::CodeGenerator::allocateSpill(int32_t dataSize, bool containsCollectedRefere
self()->getSpill16FreeList().pop_front();
}
if (
(spill && self()->getTraceRAOption(TR_TraceRASpillTemps) && !performTransformation(self()->comp(), "O^O SPILL TEMPS: Reuse spill temp %s\n", self()->getDebug()->getName(spill->getSymbolReference()))))
(spill && self()->comp()->getOption(TR_TraceRA) && !performTransformation(self()->comp(), "O^O SPILL TEMPS: Reuse spill temp %s\n", self()->getDebug()->getName(spill->getSymbolReference()))))
{
// Discard the spill temp we popped and never use it again; allocate a
// new one instead, and later, where we would have returned this spill
Expand Down Expand Up @@ -560,13 +560,13 @@ OMR::CodeGenerator::allocateSpill(int32_t dataSize, bool containsCollectedRefere
{
spillSymbol->setGCMapIndex(self()->getStackAtlas()->assignGCIndex());
_collectedSpillList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> added to collectedSpillList");
}
spill->setContainsCollectedReference(containsCollectedReference);

TR_ASSERT(spill->isOccupied(), "assertion failure");
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\nallocateSpill returning (%s(%d%d), %d) ", self()->getDebug()->getName(spill->getSymbolReference()->getSymbol()), spill->firstHalfIsOccupied()?1:0, spill->secondHalfIsOccupied()?1:0, offset? *offset : 0);
return spill;
}
Expand All @@ -578,7 +578,7 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
TR_ASSERT(offset == 0 || offset == 4, "assertion failure");
TR_ASSERT(dataSize + offset <= 16, "assertion failure");

if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
{
traceMsg(self()->comp(), "\nfreeSpill(%s(%d%d), %d, %d, isLocked=%d)",
self()->getDebug()->getName(spill->getSymbolReference()->getSymbol()),
Expand All @@ -602,7 +602,7 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
if (updateFreeList)
{
_internalPointerSpillFreeList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> Added to internalPointerSpillFreeList");
}
}
Expand All @@ -611,14 +611,14 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
if (offset == 0)
{
spill->setFirstHalfIsEmpty();
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> setFirstHalfIsEmpty");
}
else
{
TR_ASSERT(offset == 4, "assertion failure");
spill->setSecondHalfIsEmpty();
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> setSecondHalfIsEmpty");
}

Expand All @@ -630,14 +630,14 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
{
_spill4FreeList.remove(spill); // It may have been half-full before
_spill8FreeList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> moved to spill8FreeList");
}
}
else if (spill->firstHalfIsOccupied())
{
// TODO: Once every caller can cope with nonzero offsets, we should add first-half-occupied symbols into _spill4FreeList.
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> first half is still occupied; conservatively keeping out of spill4FreeList");
}
else
Expand All @@ -648,7 +648,7 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
{
// Half-free
_spill4FreeList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> moved to spill4FreeList");
}
}
Expand All @@ -662,19 +662,19 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
if (spill->getSymbolReference()->getSymbol()->getSize() <= 4)
{
_spill4FreeList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> added to spill4FreeList");
}
else if (spill->getSymbolReference()->getSymbol()->getSize() == 8)
{
_spill8FreeList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> added to spill8FreeList");
}
else if (spill->getSymbolReference()->getSymbol()->getSize() == 16)
{
_spill16FreeList.push_front(spill);
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "\n -> added to spill16FreeList");
}
}
Expand All @@ -684,7 +684,7 @@ OMR::CodeGenerator::freeSpill(TR_BackingStore *spill, int32_t dataSize, int32_t
void
OMR::CodeGenerator::jettisonAllSpills()
{
if (self()->getTraceRAOption(TR_TraceRASpillTemps))
if (self()->comp()->getOption(TR_TraceRA))
traceMsg(self()->comp(), "jettisonAllSpills: Clearing spill-temp freelists\n");
_spill4FreeList.clear();
_spill8FreeList.clear();
Expand Down
5 changes: 0 additions & 5 deletions compiler/codegen/LiveRegister.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -161,11 +161,6 @@ TR_LiveRegisters::stopUsingRegister(TR::Register *reg)
void
TR_LiveRegisters::registerIsDead(TR::Register *reg, bool updateInterferences)
{
if (comp()->getOptions()->getTraceCGOption(TR_TraceCGEvaluation))
{
getDebug()->printRegisterKilled(reg);
}

if (!reg->isLive())
return;

Expand Down
4 changes: 0 additions & 4 deletions compiler/codegen/LiveRegister.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -119,10 +119,6 @@ class TR_LiveRegisterInfo

void setNode(TR::Node *n)
{
if (comp()->getOptions()->getTraceCGOption(TR_TraceCGEvaluation))
{
getDebug()->printNodeEvaluation(n, "<- ", _register);
}
_node = n;
}

Expand Down
24 changes: 0 additions & 24 deletions compiler/codegen/NodeEvaluation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,6 @@ OMR::CodeGenerator::evaluate(TR::Node * node)
{
TR::Register *reg;

bool trace = self()->comp()->getOptions()->getTraceCGOption(TR_TraceCGEvaluation);
TR::ILOpCodes opcode = node->getOpCodeValue();

TR_ASSERT(!self()->comp()->getOption(TR_EnableParanoidRefCountChecks) || node->getOpCode().isTreeTop() || node->getReferenceCount() > 0,
Expand All @@ -65,19 +64,9 @@ OMR::CodeGenerator::evaluate(TR::Node * node)
if (opcode != TR::BBStart && node->getRegister())
{
reg = node->getRegister();
if (trace)
{
self()->getDebug()->printNodeEvaluation(node, ": ", reg);
}
}
else
{
if (trace)
{
self()->getDebug()->printNodeEvaluation(node);
_indentation += 2;
}

// Evaluation of a TR IL tree can be performed by many functions:
//
// 1) evaluate(...)
Expand Down Expand Up @@ -191,11 +180,6 @@ OMR::CodeGenerator::evaluate(TR::Node * node)

reg = _nodeToInstrEvaluators[opcode](node, self());

if (self()->comp()->getOptions()->getTraceCGOption(TR_TraceCGEvaluation))
{
self()->getDebug()->printNodeEvaluation(node, "<- ", reg, false);
_indentation -= 2;
}
if (self()->comp()->getOption(TR_TraceRegisterPressureDetails))
{
traceMsg(self()->comp(), " evaluated %s", self()->getDebug()->getName(node));
Expand Down Expand Up @@ -359,10 +343,6 @@ OMR::CodeGenerator::incReferenceCount(TR::Node *node)
#endif

rcount_t count = node->incReferenceCount();
if (self()->comp()->getOptions()->getTraceCGOption(TR_TraceCGEvaluation))
{
self()->getDebug()->printNodeEvaluation(node, "++ ", reg);
}
return count;
}

Expand Down Expand Up @@ -428,10 +408,6 @@ OMR::CodeGenerator::decReferenceCount(TR::Node * node)
#endif

rcount_t count = node->decReferenceCount();
if (self()->comp()->getOptions()->getTraceCGOption(TR_TraceCGEvaluation))
{
self()->getDebug()->printNodeEvaluation(node, "-- ", reg);
}
return count;
}

Expand Down
25 changes: 9 additions & 16 deletions compiler/codegen/OMRCodeGenPhase.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -218,7 +218,7 @@ OMR::CodeGenPhase::performProcessRelocationsPhase(TR::CodeGenerator * cg, TR::Co
}
}

if (comp->getOption(TR_TraceCG) || comp->getOptions()->getTraceCGOption(TR_TraceCGPostBinaryEncoding))
if (comp->getOption(TR_TraceCG))
{
const char * title = "Post Relocation Instructions";
comp->getDebug()->dumpMethodInstrs(comp->getOutFile(), title, false, true);
Expand Down Expand Up @@ -255,7 +255,7 @@ OMR::CodeGenPhase::performEmitSnippetsPhase(TR::CodeGenerator * cg, TR::CodeGenP
comp->getOSRCompilationData()->compressInstruction2SharedSlotMap();
}

if (comp->getOption(TR_TraceCG) || comp->getOptions()->getTraceCGOption(TR_TraceCGPostBinaryEncoding))
if (comp->getOption(TR_TraceCG))
{
diagnostic("\nbuffer start = %8x, code start = %8x, buffer length = %d", cg->getBinaryBufferStart(), cg->getCodeStart(), cg->getEstimatedCodeLength());
diagnostic("\n");
Expand Down Expand Up @@ -343,7 +343,7 @@ OMR::CodeGenPhase::performMapStackPhase(TR::CodeGenerator * cg, TR::CodeGenPhase

cg->getLinkage()->mapStack(comp->getJittedMethodSymbol());

if (comp->getOption(TR_TraceCG) || comp->getOptions()->getTraceCGOption(TR_TraceEarlyStackMap))
if (comp->getOption(TR_TraceCG))
comp->getDebug()->dumpMethodInstrs(comp->getOutFile(), "Post Stack Map", false);
}
cg->setMappingAutomatics();
Expand All @@ -360,29 +360,22 @@ OMR::CodeGenPhase::performRegisterAssigningPhase(TR::CodeGenerator * cg, TR::Cod
if (cg->getDebug())
cg->getDebug()->roundAddressEnumerationCounters();

{
{
TR::LexicalMemProfiler mp("RA", comp->phaseMemProfiler());
LexicalTimer pt("RA", comp->phaseTimer());

TR_RegisterKinds colourableKindsToAssign;
TR_RegisterKinds nonColourableKindsToAssign = cg->prepareRegistersForAssignment();
TR_RegisterKinds kindsToAssign = cg->prepareRegistersForAssignment();

cg->jettisonAllSpills(); // Spill temps used before now may lead to conflicts if also used by register assignment

// Do local register assignment for non-colourable registers.
//
if(cg->getTraceRAOption(TR_TraceRAListing))
if(cg->getDebug()) cg->getDebug()->dumpMethodInstrs(comp->getOutFile(),"Before Local RA",false);

cg->doRegisterAssignment(nonColourableKindsToAssign);
cg->doRegisterAssignment(kindsToAssign);

if (comp->compilationShouldBeInterrupted(AFTER_REGISTER_ASSIGNMENT_CONTEXT))
{
comp->failCompilation<TR::CompilationInterrupted>("interrupted after RA");
}
}

if (comp->getOption(TR_TraceCG) || comp->getOptions()->getTraceCGOption(TR_TraceCGPostRegisterAssignment))
if (comp->getOption(TR_TraceCG))
comp->getDebug()->dumpMethodInstrs(comp->getOutFile(), "Post Register Assignment Instructions", false, true);
}

Expand All @@ -403,15 +396,15 @@ OMR::CodeGenPhase::performInstructionSelectionPhase(TR::CodeGenerator * cg, TR::
TR::Compilation* comp = cg->comp();
phase->reportPhase(InstructionSelectionPhase);

if (comp->getOption(TR_TraceCG) || comp->getOption(TR_TraceTrees) || comp->getOptions()->getTraceCGOption(TR_TraceCGPreInstructionSelection))
if (comp->getOption(TR_TraceCG) || comp->getOption(TR_TraceTrees))
comp->dumpMethodTrees("Pre Instruction Selection Trees");

TR::LexicalMemProfiler mp(phase->getName(), comp->phaseMemProfiler());
LexicalTimer pt(phase->getName(), comp->phaseTimer());

cg->doInstructionSelection();

if (comp->getOption(TR_TraceCG) || comp->getOptions()->getTraceCGOption(TR_TraceCGPostInstructionSelection))
if (comp->getOption(TR_TraceCG))
comp->getDebug()->dumpMethodInstrs(comp->getOutFile(), "Post Instruction Selection Instructions", false, true);

// check reference counts
Expand Down
5 changes: 1 addition & 4 deletions compiler/codegen/OMRCodeGenerator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -969,7 +969,7 @@ OMR::CodeGenerator::toggleIsInOOLSection()

bool OMR::CodeGenerator::traceBCDCodeGen()
{
return self()->comp()->getOptions()->getTraceCGOption(TR_TraceCGBinaryCodedDecimal);
return self()->comp()->getOption(TR_TraceCG);
}

void OMR::CodeGenerator::traceBCDEntry(char *str, TR::Node *node)
Expand Down Expand Up @@ -1207,9 +1207,6 @@ OMR::CodeGenerator::opCodeIsNoOp(TR::ILOpCode &opCode)
return self()->opCodeIsNoOpOnThisPlatform(opCode);
}


bool OMR::CodeGenerator::getTraceRAOption(uint32_t mask){ return self()->comp()->getOptions()->getTraceRAOption(mask); }

void OMR::CodeGenerator::traceRAInstruction(TR::Instruction *instr)
{
const static char * traceEveryInstruction = feGetEnv("TR_traceEveryInstructionDuringRA");
Expand Down
1 change: 0 additions & 1 deletion compiler/codegen/OMRCodeGenerator.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -1045,7 +1045,6 @@ class OMR_EXTENSIBLE CodeGenerator
// --------------------------------------------------------------------------
// Register assignment tracing
//
bool getTraceRAOption(uint32_t mask);
void traceRAInstruction(TR::Instruction *instr);
void tracePreRAInstruction(TR::Instruction *instr);
void tracePostRAInstruction(TR::Instruction *instr);
Expand Down
2 changes: 1 addition & 1 deletion compiler/compile/OMRCompilation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -997,7 +997,7 @@ int32_t OMR::Compilation::compile()
}
#endif /* defined(AIXPPC) */

if (self()->getOutFile() != NULL && (self()->getOption(TR_TraceAll) || debug("traceStartCompile") || self()->getOptions()->getAnyTraceCGOption() || self()->getOption(TR_Timing)))
if (self()->getOutFile() != NULL && (self()->getOption(TR_TraceAll) || debug("traceStartCompile") || self()->getOption(TR_Timing)))
{
self()->getDebug()->printHeader();
static char *randomExercisePeriodStr = feGetEnv("TR_randomExercisePeriod");
Expand Down
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