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	* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
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Mark Shinwell committed Nov 29, 2007
1 parent 72c93f5 commit f0ef575
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Showing 23 changed files with 972 additions and 38 deletions.
15 changes: 15 additions & 0 deletions bfd/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,18 @@
2007-11-29 Mark Shinwell <shinwell@codesourcery.com>

* archures.c (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
anonymous enum.
(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
and Loongson-2F flags.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Add Loongson-2E and Loongson-2F
entries.

2007-11-29 Nick Clifton <nickc@redhat.com>

PR ld/5398
Expand Down
2 changes: 2 additions & 0 deletions bfd/archures.c
Original file line number Diff line number Diff line change
Expand Up @@ -169,6 +169,8 @@ DESCRIPTION
.#define bfd_mach_mips12000 12000
.#define bfd_mach_mips16 16
.#define bfd_mach_mips5 5
.#define bfd_mach_mips_loongson_2e 3001
.#define bfd_mach_mips_loongson_2f 3002
.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
.#define bfd_mach_mipsisa32 32
.#define bfd_mach_mipsisa32r2 33
Expand Down
2 changes: 2 additions & 0 deletions bfd/bfd-in2.h
Original file line number Diff line number Diff line change
Expand Up @@ -1843,6 +1843,8 @@ enum bfd_architecture
#define bfd_mach_mips12000 12000
#define bfd_mach_mips16 16
#define bfd_mach_mips5 5
#define bfd_mach_mips_loongson_2e 3001
#define bfd_mach_mips_loongson_2f 3002
#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
#define bfd_mach_mipsisa32 32
#define bfd_mach_mipsisa32r2 33
Expand Down
6 changes: 5 additions & 1 deletion bfd/cpu-mips.c
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,8 @@ enum
I_mipsisa64,
I_mipsisa64r2,
I_sb1,
I_loongson_2e,
I_loongson_2f
};

#define NN(index) (&arch_info_struct[(index) + 1])
Expand Down Expand Up @@ -119,7 +121,9 @@ static const bfd_arch_info_type arch_info_struct[] =
N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)),
N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)),
N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)),
N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0),
N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, NN(I_sb1)),
N (64, 64, bfd_mach_mips_loongson_2e, "mips:loongson_2e", FALSE, NN(I_loongson_2e)),
N (64, 64, bfd_mach_mips_loongson_2f, "mips:loongson_2f", FALSE, 0)
};

/* The default architecture is mips:3000, but with a machine number of
Expand Down
16 changes: 16 additions & 0 deletions bfd/elfxx-mips.c
Original file line number Diff line number Diff line change
Expand Up @@ -5221,6 +5221,12 @@ _bfd_elf_mips_mach (flagword flags)
case E_MIPS_MACH_SB1:
return bfd_mach_mips_sb1;

case E_MIPS_MACH_LS2E:
return bfd_mach_mips_loongson_2e;

case E_MIPS_MACH_LS2F:
return bfd_mach_mips_loongson_2f;

default:
switch (flags & EF_MIPS_ARCH)
{
Expand Down Expand Up @@ -9462,6 +9468,14 @@ mips_set_isa_flags (bfd *abfd)
val = E_MIPS_ARCH_5;
break;

case bfd_mach_mips_loongson_2e:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_LS2E;
break;

case bfd_mach_mips_loongson_2f:
val = E_MIPS_ARCH_3 | E_MIPS_MACH_LS2F;
break;

case bfd_mach_mips_sb1:
val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
break;
Expand Down Expand Up @@ -11228,6 +11242,8 @@ static const struct mips_mach_extension mips_mach_extensions[] = {
{ bfd_mach_mips4111, bfd_mach_mips4100 },

/* MIPS III extensions. */
{ bfd_mach_mips_loongson_2e, bfd_mach_mips4000 },
{ bfd_mach_mips_loongson_2f, bfd_mach_mips4000 },
{ bfd_mach_mips8000, bfd_mach_mips4000 },
{ bfd_mach_mips4650, bfd_mach_mips4000 },
{ bfd_mach_mips4600, bfd_mach_mips4000 },
Expand Down
5 changes: 5 additions & 0 deletions binutils/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,8 @@
2007-11-29 Mark Shinwell <shinwell@codesourcery.com>

* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
flags.

2007-11-26 Alan Modra <amodra@bigpond.net.au>

* cxxfilt.c (demangle_it): Don't call printf without format string.
Expand Down
2 changes: 2 additions & 0 deletions binutils/readelf.c
Original file line number Diff line number Diff line change
Expand Up @@ -2194,6 +2194,8 @@ get_machine_flags (unsigned e_flags, unsigned e_machine)
case E_MIPS_MACH_5500: strcat (buf, ", 5500"); break;
case E_MIPS_MACH_SB1: strcat (buf, ", sb1"); break;
case E_MIPS_MACH_9000: strcat (buf, ", 9000"); break;
case E_MIPS_MACH_LS2E: strcat (buf, ", loongson-2e"); break;
case E_MIPS_MACH_LS2F: strcat (buf, ", loongson-2f"); break;
case 0:
/* We simply ignore the field in this case to avoid confusion:
MIPS ELF does not specify EF_MIPS_MACH, it is a GNU
Expand Down
6 changes: 6 additions & 0 deletions gas/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,9 @@
2007-11-29 Mark Shinwell <shinwell@codesourcery.com>

* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
and loongson2f entries.
* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>

* config/tc-s390.c (md_begin): If the -mesa option is specified
Expand Down
4 changes: 4 additions & 0 deletions gas/config/tc-mips.c
Original file line number Diff line number Diff line change
Expand Up @@ -14823,6 +14823,10 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
{ "sb1a", MIPS_CPU_ASE_MIPS3D | MIPS_CPU_ASE_MDMX,
ISA_MIPS64, CPU_SB1 },

/* ST Microelectronics Loongson 2E and 2F cores */
{ "loongson2e", 0, ISA_MIPS3, CPU_LOONGSON_2E },
{ "loongson2f", 0, ISA_MIPS3, CPU_LOONGSON_2F },

/* End marker */
{ NULL, 0, 0, 0 }
};
Expand Down
4 changes: 3 additions & 1 deletion gas/doc/c-mips.texi
Original file line number Diff line number Diff line change
Expand Up @@ -270,7 +270,9 @@ m4kp,
20kc,
25kf,
sb1,
sb1a
sb1a,
loongson2e,
loongson2f
@end quotation

For compatibility reasons, @samp{@var{n}x} and @samp{@var{b}fx} are
Expand Down
6 changes: 6 additions & 0 deletions gas/testsuite/ChangeLog
Original file line number Diff line number Diff line change
@@ -1,3 +1,9 @@
2007-11-29 Mark Shinwell <shinwell@codesourcery.com>

* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
and loongson2f entries.
* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>

* gas/s390/esa-z9-109.d: Add check for old version of sske.
Expand Down
150 changes: 150 additions & 0 deletions gas/testsuite/gas/mips/loongson-2e.d
Original file line number Diff line number Diff line change
@@ -0,0 +1,150 @@
#as: -march=loongson2e -mabi=o64
#objdump: -M reg-names=numeric -dr
#name: ST Microelectronics Loongson-2E tests

.*: file format .*

Disassembly of section .text:

[0-9a-f]+ <movz_insns>:
.*: 0064100a movz \$2,\$3,\$4
.*: 0064100b movn \$2,\$3,\$4
.*: 0064100b movn \$2,\$3,\$4

[0-9a-f]+ <integer_insns>:
.*: 7c641018 mult.g \$2,\$3,\$4
.*: 7cc72819 multu.g \$5,\$6,\$7
.*: 7d2a401c dmult.g \$8,\$9,\$10
.*: 7d8d581d dmultu.g \$11,\$12,\$13
.*: 7df0701a div.g \$14,\$15,\$16
.*: 7e53881b divu.g \$17,\$18,\$19
.*: 7eb6a01e ddiv.g \$20,\$21,\$22
.*: 7f19b81f ddivu.g \$23,\$24,\$25
.*: 7f7cd022 mod.g \$26,\$27,\$28
.*: 7fdfe823 modu.g \$29,\$30,\$31
.*: 7c641026 dmod.g \$2,\$3,\$4
.*: 7cc72827 dmodu.g \$5,\$6,\$7

[0-9a-f]+ <fpu_insns>:
.*: 46020818 madd.s \$f0,\$f1,\$f2
.*: 462520d8 madd.d \$f3,\$f4,\$f5
.*: 45683998 madd.ps \$f6,\$f7,\$f8
.*: 460b5259 msub.s \$f9,\$f10,\$f11
.*: 462e6b19 msub.d \$f12,\$f13,\$f14
.*: 457183d9 msub.ps \$f15,\$f16,\$f17
.*: 46149c9a nmadd.s \$f18,\$f19,\$f20
.*: 4637b55a nmadd.d \$f21,\$f22,\$f23
.*: 457ace1a nmadd.ps \$f24,\$f25,\$f26
.*: 461de6db nmsub.s \$f27,\$f28,\$f29
.*: 4622081b nmsub.d \$f0,\$f1,\$f2
.*: 456520db nmsub.ps \$f3,\$f4,\$f5

[0-9a-f]+ <simd_insns>:
.*: 47420802 packsshb \$f0,\$f1,\$f2
.*: 472520c2 packsswh \$f3,\$f4,\$f5
.*: 47683982 packushb \$f6,\$f7,\$f8
.*: 47cb5240 paddb \$f9,\$f10,\$f11
.*: 474e6b00 paddh \$f12,\$f13,\$f14
.*: 477183c0 paddw \$f15,\$f16,\$f17
.*: 47f49c80 paddd \$f18,\$f19,\$f20
.*: 4797b540 paddsb \$f21,\$f22,\$f23
.*: 471ace00 paddsh \$f24,\$f25,\$f26
.*: 47bde6c0 paddusb \$f27,\$f28,\$f29
.*: 47220800 paddush \$f0,\$f1,\$f2
.*: 47e520c2 pandn \$f3,\$f4,\$f5
.*: 46683980 pavgb \$f6,\$f7,\$f8
.*: 464b5240 pavgh \$f9,\$f10,\$f11
.*: 46ce6b01 pcmpeqb \$f12,\$f13,\$f14
.*: 469183c1 pcmpeqh \$f15,\$f16,\$f17
.*: 46549c81 pcmpeqw \$f18,\$f19,\$f20
.*: 46f7b541 pcmpgtb \$f21,\$f22,\$f23
.*: 46bace01 pcmpgth \$f24,\$f25,\$f26
.*: 467de6c1 pcmpgtw \$f27,\$f28,\$f29
.*: 45c20802 pextrh \$f0,\$f1,\$f2
.*: 478520c3 pinsrh_0 \$f3,\$f4,\$f5
.*: 47a83983 pinsrh_1 \$f6,\$f7,\$f8
.*: 47cb5243 pinsrh_2 \$f9,\$f10,\$f11
.*: 47ee6b03 pinsrh_3 \$f12,\$f13,\$f14
.*: 45f183c2 pmaddhw \$f15,\$f16,\$f17
.*: 46949c80 pmaxsh \$f18,\$f19,\$f20
.*: 46d7b540 pmaxub \$f21,\$f22,\$f23
.*: 46bace00 pminsh \$f24,\$f25,\$f26
.*: 46fde6c0 pminub \$f27,\$f28,\$f29
.*: 46a00805 pmovmskb \$f0,\$f1
.*: 46e41882 pmulhuh \$f2,\$f3,\$f4
.*: 46a73142 pmulhh \$f5,\$f6,\$f7
.*: 468a4a02 pmullh \$f8,\$f9,\$f10
.*: 46cd62c2 pmuluw \$f11,\$f12,\$f13
.*: 45b07b81 pasubub \$f14,\$f15,\$f16
.*: 46809445 biadd \$f17,\$f18
.*: 4715a4c2 pshufh \$f19,\$f20,\$f21
.*: 4678bd82 psllh \$f22,\$f23,\$f24
.*: 465bd642 psllw \$f25,\$f26,\$f27
.*: 46beef03 psrah \$f28,\$f29,\$f30
.*: 46820803 psraw \$f0,\$f1,\$f2
.*: 466520c3 psrlh \$f3,\$f4,\$f5
.*: 46483983 psrlw \$f6,\$f7,\$f8
.*: 47cb5241 psubb \$f9,\$f10,\$f11
.*: 474e6b01 psubh \$f12,\$f13,\$f14
.*: 477183c1 psubw \$f15,\$f16,\$f17
.*: 47f49c81 psubd \$f18,\$f19,\$f20
.*: 4797b541 psubsb \$f21,\$f22,\$f23
.*: 471ace01 psubsh \$f24,\$f25,\$f26
.*: 47bde6c1 psubusb \$f27,\$f28,\$f29
.*: 47220801 psubush \$f0,\$f1,\$f2
.*: 476520c3 punpckhbh \$f3,\$f4,\$f5
.*: 47283983 punpckhhw \$f6,\$f7,\$f8
.*: 46eb5243 punpckhwd \$f9,\$f10,\$f11
.*: 474e6b03 punpcklbh \$f12,\$f13,\$f14
.*: 471183c3 punpcklhw \$f15,\$f16,\$f17
.*: 46d49c83 punpcklwd \$f18,\$f19,\$f20

[0-9a-f]+ <fixed_point_insns>:
.*: 45c20800 add \$f0,\$f1,\$f2
.*: 458520c0 addu \$f3,\$f4,\$f5
.*: 45e83980 dadd \$f6,\$f7,\$f8
.*: 45cb5241 sub \$f9,\$f10,\$f11
.*: 458e6b01 subu \$f12,\$f13,\$f14
.*: 45f183c1 dsub \$f15,\$f16,\$f17
.*: 45b49c80 or \$f18,\$f19,\$f20
.*: 4597b542 sll \$f21,\$f22,\$f23
.*: 45bace02 dsll \$f24,\$f25,\$f26
.*: 479de6c2 xor \$f27,\$f28,\$f29
.*: 47a20802 nor \$f0,\$f1,\$f2
.*: 47c520c2 and \$f3,\$f4,\$f5
.*: 45883983 srl \$f6,\$f7,\$f8
.*: 45ab5243 dsrl \$f9,\$f10,\$f11
.*: 45ce6b03 sra \$f12,\$f13,\$f14
.*: 45f183c3 dsra \$f15,\$f16,\$f17
.*: 46939032 sequ \$f18,\$f19
.*: 4695a03c sltu \$f20,\$f21
.*: 4697b03e sleu \$f22,\$f23
.*: 46b9c032 seq \$f24,\$f25
.*: 46bbd03c slt \$f26,\$f27
.*: 46bde03e sle \$f28,\$f29

[0-9a-f]+ <mips5_ps_insns>:
.*: 45601005 abs.ps \$f0,\$f2
.*: 45662080 add.ps \$f2,\$f4,\$f6
.*: 456a4032 c.eq.ps \$f8,\$f10
.*: 456a4030 c.f.ps \$f8,\$f10
.*: 456a403e c.le.ps \$f8,\$f10
.*: 456a403c c.lt.ps \$f8,\$f10
.*: 456a403d c.nge.ps \$f8,\$f10
.*: 456a403b c.ngl.ps \$f8,\$f10
.*: 456a4039 c.ngle.ps \$f8,\$f10
.*: 456a403f c.ngt.ps \$f8,\$f10
.*: 456a4036 c.ole.ps \$f8,\$f10
.*: 456a4034 c.olt.ps \$f8,\$f10
.*: 456a403a c.seq.ps \$f8,\$f10
.*: 456a4038 c.sf.ps \$f8,\$f10
.*: 456a4033 c.ueq.ps \$f8,\$f10
.*: 456a4037 c.ule.ps \$f8,\$f10
.*: 456a4035 c.ult.ps \$f8,\$f10
.*: 456a4031 c.un.ps \$f8,\$f10
.*: 4560d606 mov.ps \$f24,\$f26
.*: 45662082 mul.ps \$f2,\$f4,\$f6
.*: 45604187 neg.ps \$f6,\$f8
.*: 457ac581 sub.ps \$f22,\$f24,\$f26
#pass

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