Update README.md

dshekhalev · Jan 13, 2023 · 8739640 · 8739640
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diff --git a/rtl/ldpc/README.md b/rtl/ldpc/README.md
@@ -22,7 +22,7 @@ Decoder speed 8 metrics per tick, LLR bitwidth = 4bits, 10 iteration
 
 Decoder simple	: LUT/REG/RAMB 	4.6k/7.6k/17.0 	~250MHz (90Mbps -> 75Mbps) 
 
-Attention: to facilitate synthesis, the decoder uses the address file generated during the simulation. The file content depend on the decoder performance settings. Before synthesizing the decoder, run the simulation in the desired mode!!!
+Attention: to facilitate synthesis, the decoder uses the address file generated during the simulation. The file content depend on the coderate, length & decoder performance settings. Before synthesizing the decoder, run the simulation in the desired mode!!!