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Move rebase fixups
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natestuder committed Apr 9, 2020
1 parent 68bf3b5 commit 77a5a07
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Showing 5 changed files with 45 additions and 49 deletions.
30 changes: 14 additions & 16 deletions FreeRTOS/Demo/RISC-V-ISP/BuildEnvironment.mk
Original file line number Diff line number Diff line change
Expand Up @@ -3,37 +3,35 @@
# Copyright (c) 2019, Dornerworks Ltd.
#

CROSS_COMPILE_PREFIX := riscv$(ARCH_XLEN)-unknown-elf
#-----------------------------------------------------------
GCC = $(ISP_PREFIX)/bin/clang
ifeq ($(ARCH), rv64)
GCC = $(CROSS_COMPILE_PREFIX)-gcc
endif
OBJCOPY = $(CROSS_COMPILE_PREFIX)-objcopy
OBJDUMP = $(CROSS_COMPILE_PREFIX)-objdump
AR = $(CROSS_COMPILE_PREFIX)-ar
RANLIB = $(CROSS_COMPILE_PREFIX)-ranlib
GDB = $(CROSS_COMPILE_PREFIX)-gdb

OBJCOPY = $(ISP_PREFIX)/bin/llvm-objcopy
OBJDUMP = $(ISP_PREFIX)/bin/llvm-objdump
AR = $(ISP_PREFIX)/bin/llvm-ar
RANLIB = $(ISP_PREFIX)/bin/llvm-ranlib
GDB = $(ISP_PREFIX)/bin/riscv64-unknown-elf-gdb

INTERRUPT_HANDLER = handle_trap
MSI_HANDLER = as_yet_unhandled

# if using the multi-arch (riscv64-unknown-elf-gcc):
ARCH_FLAGS = -march=rv32ima -mabi=ilp32 -mcmodel=medium
ifeq ($(ARCH), rv64)
ARCH_FLAGS = -march=rv64imafd -mabi=lp64d -mcmodel=medany
ifneq ($(ARCH), rv64)
ARCH_FLAGS = -march=rv32ima -mabi=ilp32 -mcmodel=medium --target=riscv32-unknown-elf
else
ARCH_FLAGS = -march=rv64imafd -mabi=lp64d -mcmodel=medany --target=riscv64-unknown-elf
endif

# Basic ISP_CFLAGS:
ISP_CFLAGS = -Wall -Wextra -O0 -g3 -std=gnu11
ISP_CFLAGS = -Wall -Wextra -O0 -g3 -std=gnu11 -mno-relax
ISP_CFLAGS += -ffunction-sections -fdata-sections -fno-builtin-printf
ISP_CFLAGS += -DDONT_USE_PLIC -DDONT_USE_M_TIME -Dmalloc\(x\)=pvPortMalloc\(x\) -Dfree\(x\)=vPortFree\(x\)
ISP_CFLAGS += -include sys/cdefs.h
ISP_CFLAGS += $(ARCH_FLAGS)
ISP_CFLAGS += -I $(ISP_PREFIX)/$(CROSS_COMPILE_PREFIX)/include
ISP_CFLAGS += -I $(ISP_PREFIX)/clang_sysroot/riscv$(ARCH_XLEN)-unknown-elf/include
# These flags are for outputing *.d dependency files for make

ISP_ASMFLAGS = -O0 -g3
ISP_ASMFLAGS = -O0 -g3 -mno-relax
ISP_ASMFLAGS += $(ARCH_FLAGS)
ISP_ASMFLAGS += -DportasmHANDLE_INTERRUPT=$(INTERRUPT_HANDLER)
ISP_ASMFLAGS += -DportasmMSI_HANDLER=$(MSI_HANDLER)
Expand All @@ -48,7 +46,7 @@ ISP_LDFLAGS := -Xlinker --defsym=__stack_size=1K
ISP_LDFLAGS += -O0 -g3
ISP_LDFLAGS += -ffunction-sections -fdata-sections --specs=nano.specs
ISP_LDFLAGS += -nostartfiles
ISP_LDFLAGS += -T $(LINKER_SCRIPT)
ISP_LDFLAGS += -T $(LINKER_SCRIPT) -fuse-ld=lld

ISP_LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=$(s))
ISP_LDFLAGS += $(foreach s,$(LIBWRAP_SYMS),-Wl,--wrap=_$(s))
Original file line number Diff line number Diff line change
@@ -1,11 +1,15 @@
// See LICENSE file for license details

#include "platform.h"
#include "encoding.h"

#ifdef PRCI_CTRL_ADDR
#include "fe300prci/fe300prci_driver.h"
#include <unistd.h>

#if __riscv_xlen == 64
#define rdmcycle(x) {*(x) = read_csr(mcycle); }
#elif __riscv_xlen == 32
#define rdmcycle(x) { \
uint32_t lo, hi, hi2; \
__asm__ __volatile__ ("1:\n\t" \
Expand All @@ -16,6 +20,7 @@
: "=r" (hi), "=r" (lo), "=r" (hi2)) ; \
*(x) = lo | ((uint64_t) hi << 32); \
}
#endif

uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq)
{
Expand Down
20 changes: 4 additions & 16 deletions FreeRTOS/Demo/RISC-V-ISP/freedom-e-sdk/env/encoding.h
Original file line number Diff line number Diff line change
Expand Up @@ -171,30 +171,18 @@
__tmp; })

#define write_csr(reg, val) ({ \
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
else \
asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
asm volatile ("csrw " #reg ", %0" :: "rK"(val)); })

#define swap_csr(reg, val) ({ unsigned long __tmp; \
if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
else \
asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val)); \
__tmp; })

#define set_csr(reg, bit) ({ unsigned long __tmp; \
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
else \
asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \
__tmp; })

#define clear_csr(reg, bit) ({ unsigned long __tmp; \
if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
else \
asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \
__tmp; })

#define rdtime() read_csr(time)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@ ENTRY( _start )

MEMORY
{
flash (rxai!w) : ORIGIN = 0x20400000, LENGTH = 512M
ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 8M
flash (rxa!w) : ORIGIN = 0x20400000, LENGTH = 512M
ram (wxa!r) : ORIGIN = 0x80000000, LENGTH = 8M
}

PHDRS
Expand All @@ -17,22 +17,24 @@ PHDRS

SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 4K;
__stack_size = DEFINED(__stack_size) ? __stack_size : 4K;

.init :
.init ALIGN(4):
{
KEEP (*(SORT_NONE(.init)))
} >flash AT>flash :flash

.text :
.text ALIGN(4):
{
*(.text.unlikely .text.unlikely.*)
*(.text.startup .text.startup.*)
*(.text .text.*)
*(.gnu.linkonce.t.*)
*(.eh_frame_hdr)
*(.eh_frame)
} >flash AT>flash :flash

.fini :
.fini ALIGN(4):
{
KEEP (*(SORT_NONE(.fini)))
} >flash AT>flash :flash
Expand All @@ -41,39 +43,40 @@ SECTIONS
PROVIDE (_etext = .);
PROVIDE (etext = .);

.rodata :
.rodata ALIGN(4):
{
. = ALIGN(4);
*(.rdata)
*(.rodata .rodata.*)
*(.gnu.linkonce.r.*)
} >flash AT>flash :flash

. = ALIGN(4);

.preinit_array :
.preinit_array ALIGN(4):
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >flash AT>flash :flash

.init_array :
.init_array ALIGN(4):
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >flash AT>flash :flash

.fini_array :
.fini_array ALIGN(4):
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >flash AT>flash :flash

.ctors :
.ctors ALIGN(4):
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
Expand All @@ -95,7 +98,7 @@ SECTIONS
KEEP (*(.ctors))
} >flash AT>flash :flash

.dtors :
.dtors ALIGN(4):
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
Expand All @@ -104,19 +107,19 @@ SECTIONS
KEEP (*(.dtors))
} >flash AT>flash :flash

.lalign :
.lalign ALIGN(4):
{
. = ALIGN(4);
PROVIDE( _data_lma = . );
} >flash AT>flash :flash

.dalign :
.dalign ALIGN(4):
{
. = ALIGN(4);
PROVIDE( _data = . );
} >ram AT>flash :ram_init

.data :
.data ALIGN(4):
{
*(.data .data.*)
*(.gnu.linkonce.d.*)
Expand All @@ -138,7 +141,7 @@ SECTIONS

PROVIDE( _fbss = . );
PROVIDE( __bss_start = . );
.bss :
.bss ALIGN(4):
{
*(.sbss*)
*(.gnu.linkonce.sb.*)
Expand All @@ -155,7 +158,7 @@ SECTIONS
.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
{
PROVIDE( _heap_end = . );
. = __stack_size;
. += __stack_size;
PROVIDE( _sp = . );
__freertos_irq_stack_top = .;
} >ram AT>ram :ram
Expand Down
2 changes: 2 additions & 0 deletions FreeRTOS/Demo/RISC-V-ISP/freedom-e-sdk/env/start.S
Original file line number Diff line number Diff line change
Expand Up @@ -47,9 +47,11 @@ _start:
2:

/* Call global constructors */
/*
la a0, __libc_fini_array
call atexit
call __libc_init_array
*/

#ifndef __riscv_float_abi_soft
/* Enable FPU */
Expand Down

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