[Mono] [RISCV] Fix abi issues (Monthly pr) #88649
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process stack size larger than imm32
fix mono_riscv_emit_branch_exc
lowering OP_XOR_IMM&OP_IXOR_IMM
- OP_FCONV_TO_I8 - OP_LXOR_IMM - OP_ISHR
- relaxed_nop - float_cle - long_shl - OP_ICONV_TO_R_UN - OP_LCONV_TO_I2 - OP_FBGE - OP_IDIV_IMM
- The ABI specify that If the reture value would have been passed by reference, the caller will allocates memory for the return value, and passes the address as an implicit first parameter. - The Mono will treat first parameter as this_pointer reference to `mono_vcall_trampoline()`. They are conflict a bit.
OP_ATOMIC_LOAD_U1 OP_IREM_UN_IMM
OP_IREM -> riscv_remw OP_IREM_UN -> riscv_remuw
use mono_riscv_emit_loadu to emit lwu fix rem
Xinlong-Wu
requested review from
vargaz,
lambdageek and
SamMonoRT
as code owners
ghost
added
community-contribution
| @@ -393,7 +393,11 @@ mono_type_to_load_membase (MonoCompile *cfg, MonoType *type) | |||
| case MONO_TYPE_I4: | |||
| return OP_LOADI4_MEMBASE; | |||
| case MONO_TYPE_U4: | |||
| #ifdef TARGET_RISCV64 | |||
| return OP_LOADI4_MEMBASE; | |||
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cuz the psABI of RISCV hase specify that
When passed in registers or on the stack, integer scalars narrower than XLEN bits are widened according to the sign of their type up to 32 bits, then sign-extended to XLEN bits.
The syntax of LW and LWU in riscv-spec-20191213.pdf are
LW: x[rd] = sext(M[x[rs1] + sext(offset)][31:0])
LWU: x[rd] = M[x[rs1] + sext(offset)][31:0]
SW: M[x[rs1] + sext(offset) = x[rs2][31: 0]
there is no SWU inst
The LW instruction loads a 32-bit value from memory and sign-extends this to 64 bits before storing it in register rd for RV64I. The LWU instruction, on the other hand, zero-extends the 32-bit value from memory for RV64I. LH and LHU are defined analogously for 16-bit values, as are LB and LBU for 8-bit values. The SD, SW, SH, and SB instructions store 64-bit, 32-bit, 16-bit, and 8-bit values from the low bits of register rs2 to memory respectively
which means the unsigned value on stack will be load by the same instruction as signed value. Following picture is generate by clang rv64 trunk https://godbolt.org/z/Tj3e3nYM6 as example.
while OP_LOADU4_MEMBASE inst will only be used when zero extend.
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except that, the (uint32_t)-1 will be load into reg as 0xFFFFFFFFFFFFFFFF in rv64 directly. if we use lwu to load -1 on stack, it will be 0x00000000FFFFFFFF. Thus, it will cause the -1 in reg doesn't equals to the -1 on stack.
Hope I have explain it clearly.
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does this conversation be solved? Since I explain why I write like that.
|
The rest of the changes look ok. |
ghost
locked as resolved and limited conversation to collaborators
In this pr, Mono can run 'default-interface-members-versions' and 'exploration' of repo https://github.com/dotnet/samples
More information plz refer to https://github.com/Xinlong-Wu/runtime/blob/riscv-jit-rv64/RISCV64-PORTING.md