Adding the Vector512 and Vector512<T> types

src/coreclr/inc/readytorun.h

@@ -14,11 +14,13 @@
 
 #define READYTORUN_SIGNATURE 0x00525452 // 'RTR'
 
-// Keep these in sync with src/coreclr/tools/Common/Internal/Runtime/ModuleHeaders.cs
-#define READYTORUN_MAJOR_VERSION 0x0008
+// Keep these in sync with
+//  src/coreclr/tools/Common/Internal/Runtime/ModuleHeaders.cs
+//  src/coreclr/nativeaot/Runtime/inc/ModuleHeaders.h
+#define READYTORUN_MAJOR_VERSION 0x0009
 #define READYTORUN_MINOR_VERSION 0x0000
 
-#define MINIMUM_READYTORUN_MAJOR_VERSION 0x008
+#define MINIMUM_READYTORUN_MAJOR_VERSION 0x009
 
 // R2R Version 2.1 adds the InliningInfo section
 // R2R Version 2.2 adds the ProfileDataInfo section
@@ -27,6 +29,7 @@
 // R2R Version 6.0 changes managed layout for sequential types with any unmanaged non-blittable fields.
 //     R2R 6.0 is not backward compatible with 5.x or earlier.
 // R2R Version 8.0 Changes the alignment of the Int128 type
+// R2R Version 9.0 adds support for the Vector512 type
 
 struct READYTORUN_CORE_HEADER
 {

src/coreclr/jit/hwintrinsicarm64.cpp

@@ -762,22 +762,25 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic        intrinsic,
         {
             assert(sig->numArgs == 2);
 
-            if (varTypeIsFloating(simdBaseType))
+            if (!varTypeIsFloating(simdBaseType))
             {
-                CORINFO_ARG_LIST_HANDLE arg1     = sig->args;
-                CORINFO_ARG_LIST_HANDLE arg2     = info.compCompHnd->getArgNext(arg1);
-                var_types               argType  = TYP_UNKNOWN;
-                CORINFO_CLASS_HANDLE    argClass = NO_CLASS_HANDLE;
+                // We can't trivially handle division for integral types using SIMD
+                break;
+            }
+
+            CORINFO_ARG_LIST_HANDLE arg1     = sig->args;
+            CORINFO_ARG_LIST_HANDLE arg2     = info.compCompHnd->getArgNext(arg1);
+            var_types               argType  = TYP_UNKNOWN;
+            CORINFO_CLASS_HANDLE    argClass = NO_CLASS_HANDLE;
 
-                argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass)));
-                op2     = getArgForHWIntrinsic(argType, argClass);
+            argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass)));
+            op2     = getArgForHWIntrinsic(argType, argClass);
 
-                argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg1, &argClass)));
-                op1     = getArgForHWIntrinsic(argType, argClass);
+            argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg1, &argClass)));
+            op1     = getArgForHWIntrinsic(argType, argClass);
 
-                retNode = gtNewSimdBinOpNode(GT_DIV, retType, op1, op2, simdBaseJitType, simdSize,
-                                             /* isSimdAsHWIntrinsic */ false);
-            }
+            retNode = gtNewSimdBinOpNode(GT_DIV, retType, op1, op2, simdBaseJitType, simdSize,
+                                         /* isSimdAsHWIntrinsic */ false);
             break;
         }
 

src/coreclr/jit/hwintrinsicxarch.cpp

@@ -1145,23 +1145,25 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic        intrinsic,
         {
             assert(sig->numArgs == 2);
 
-            if (varTypeIsFloating(simdBaseType))
+            if (!varTypeIsFloating(simdBaseType))
             {
-                CORINFO_ARG_LIST_HANDLE arg1     = sig->args;
-                CORINFO_ARG_LIST_HANDLE arg2     = info.compCompHnd->getArgNext(arg1);
-                var_types               argType  = TYP_UNKNOWN;
-                CORINFO_CLASS_HANDLE    argClass = NO_CLASS_HANDLE;
+                // We can't trivially handle division for integral types using SIMD
+                break;
+            }
 
-                argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass)));
-                op2     = getArgForHWIntrinsic(argType, argClass);
+            CORINFO_ARG_LIST_HANDLE arg1     = sig->args;
+            CORINFO_ARG_LIST_HANDLE arg2     = info.compCompHnd->getArgNext(arg1);
+            var_types               argType  = TYP_UNKNOWN;
+            CORINFO_CLASS_HANDLE    argClass = NO_CLASS_HANDLE;
 
-                argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg1, &argClass)));
-                op1     = getArgForHWIntrinsic(argType, argClass);
+            argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass)));
+            op2     = getArgForHWIntrinsic(argType, argClass);
 
-                retNode = gtNewSimdBinOpNode(GT_DIV, retType, op1, op2, simdBaseJitType, simdSize,
-                                             /* isSimdAsHWIntrinsic */ false);
-                break;
-            }
+            argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg1, &argClass)));
+            op1     = getArgForHWIntrinsic(argType, argClass);
+
+            retNode = gtNewSimdBinOpNode(GT_DIV, retType, op1, op2, simdBaseJitType, simdSize,
+                                         /* isSimdAsHWIntrinsic */ false);
             break;
         }
 
@@ -2061,7 +2063,7 @@ GenTree* Compiler::impBaseIntrinsic(NamedIntrinsic        intrinsic,
         {
             assert(sig->numArgs == 2);
 
-            if (varTypeIsByte(simdBaseType) || varTypeIsLong(simdBaseType))
+            if (varTypeIsByte(simdBaseType) || varTypeIsLong(simdBaseType) || (simdBaseType == TYP_DOUBLE))
             {
                 // byte, sbyte, long, and ulong would require more work to support
                 break;

src/coreclr/nativeaot/Runtime/inc/ModuleHeaders.h

@@ -4,13 +4,14 @@
 //
 // Please keep the data structures in this file in sync with the managed version at
 //  src/Common/src/Internal/Runtime/ModuleHeaders.cs
-//
+//  src/coreclr/inc/readytorun.h
+
 
 struct ReadyToRunHeaderConstants
 {
     static const uint32_t Signature = 0x00525452; // 'RTR'
 
-    static const uint32_t CurrentMajorVersion = 8;
+    static const uint32_t CurrentMajorVersion = 9;
     static const uint32_t CurrentMinorVersion = 0;
 };
 

src/coreclr/tools/Common/Compiler/VectorFieldLayoutAlgorithm.cs

@@ -44,9 +44,28 @@ public override ComputedInstanceFieldLayout ComputeInstanceLayout(DefType defTyp
                     alignment = new LayoutInt(16);
                 }
             }
+            else if (name == "Vector256`1")
+            {
+                if (defType.Context.Target.Architecture == TargetArchitecture.ARM)
+                {
+                    // No such type exists for the Procedure Call Standard for ARM. We will default
+                    // to the same alignment as __m128, which is supported by the ABI.
+                    alignment = new LayoutInt(8);
+                }
+                else if (defType.Context.Target.Architecture == TargetArchitecture.ARM64)
+                {
+                    // The Procedure Call Standard for ARM 64-bit (with SVE support) defaults to
+                    // 16-byte alignment for __m256.
+                    alignment = new LayoutInt(16);
+                }
+                else
+                {
+                    alignment = new LayoutInt(32);
+                }
+            }
             else
             {
-                Debug.Assert(name == "Vector256`1");
+                Debug.Assert(name == "Vector512`1");
 
                 if (defType.Context.Target.Architecture == TargetArchitecture.ARM)
                 {
@@ -62,7 +81,7 @@ public override ComputedInstanceFieldLayout ComputeInstanceLayout(DefType defTyp
                 }
                 else
                 {
-                    alignment = new LayoutInt(32);
+                    alignment = new LayoutInt(64);
                 }
             }
 
@@ -106,6 +125,7 @@ public override ValueTypeShapeCharacteristics ComputeValueTypeShapeCharacteristi
                     8 => ValueTypeShapeCharacteristics.Vector64Aggregate,
                     16 => ValueTypeShapeCharacteristics.Vector128Aggregate,
                     32 => ValueTypeShapeCharacteristics.Vector128Aggregate,
+                    64 => ValueTypeShapeCharacteristics.Vector128Aggregate,
                     _ => ValueTypeShapeCharacteristics.None
                 };
             }
@@ -116,9 +136,10 @@ public static bool IsVectorType(DefType type)
         {
             return type.IsIntrinsic &&
                 type.Namespace == "System.Runtime.Intrinsics" &&
-                (type.Name == "Vector64`1" ||
-                type.Name == "Vector128`1" ||
-                type.Name == "Vector256`1");
+                ((type.Name == "Vector64`1") ||
+                 (type.Name == "Vector128`1") ||
+                 (type.Name == "Vector256`1") ||
+                 (type.Name == "Vector512`1"));
         }
     }
 }

src/coreclr/tools/Common/Internal/Runtime/ModuleHeaders.cs

@@ -8,13 +8,14 @@ namespace Internal.Runtime
     //
     // Please keep the data structures in this file in sync with the native version at
     //  src/coreclr/inc/readytorun.h
+    //  src/coreclr/nativeaot/Runtime/inc/ModuleHeaders.h
     //
 
     internal struct ReadyToRunHeaderConstants
     {
         public const uint Signature = 0x00525452; // 'RTR'
 
-        public const ushort CurrentMajorVersion = 8;
+        public const ushort CurrentMajorVersion = 9;
         public const ushort CurrentMinorVersion = 0;
     }
 #if READYTORUN

src/coreclr/tools/Common/TypeSystem/CodeGen/TargetDetails.CodeGen.cs

@@ -40,5 +40,10 @@ public enum SimdVectorLength
         /// Specifies that native vectors are 256 bit (e.g. AVX on x86).
         /// </summary>
         Vector256Bit,
+
+        /// <summary>
+        /// Specifies that native vectors are 512 bit (e.g. AVX512 on x86).
+        /// </summary>
+        Vector512Bit,
     }
 }

src/coreclr/tools/Common/TypeSystem/Common/TargetDetails.cs

@@ -109,21 +109,21 @@ public int MaximumAlignment
             {
                 if (Architecture == TargetArchitecture.ARM)
                 {
-                    // Corresponds to alignment required for __m128 (there's no __m256)
+                    // Corresponds to alignment required for __m128 (there's no __m256/__m512)
                     return 8;
                 }
                 else if (Architecture == TargetArchitecture.ARM64)
                 {
-                    // Corresponds to alignmet required for __m256
+                    // Corresponds to alignmet required for __m128 (there's no __m256/__m512)
                     return 16;
                 }
                 else if (Architecture == TargetArchitecture.LoongArch64)
                 {
                     return 16;
                 }
 
-                // 256-bit vector is the type with the highest alignment we support
-                return 32;
+                // 512-bit vector is the type with the highest alignment we support
+                return 64;
             }
         }
 
@@ -136,8 +136,8 @@ public int DefaultPackingSize
         {
             get
             {
-                // We use default packing size of 32 irrespective of the platform.
-                return 32;
+                // We use default packing size of 64 irrespective of the platform.
+                return 64;
             }
         }
 

src/coreclr/tools/Common/TypeSystem/Interop/IL/MarshalHelpers.cs

@@ -874,13 +874,15 @@ private static bool IsValidForGenericMarshalling(
             // * Vector64<T>: Represents the __m64 ABI primitive which requires currently unimplemented handling
             // * Vector128<T>: Represents the __m128 ABI primitive which requires currently unimplemented handling
             // * Vector256<T>: Represents the __m256 ABI primitive which requires currently unimplemented handling
+            // * Vector512<T>: Represents the __m512 ABI primitive which requires currently unimplemented handling
             // * Vector<T>: Has a variable size (either __m128 or __m256) and isn't readily usable for interop scenarios
             return !InteropTypes.IsSystemNullable(type.Context, type)
                 && !InteropTypes.IsSystemSpan(type.Context, type)
                 && !InteropTypes.IsSystemReadOnlySpan(type.Context, type)
                 && !InteropTypes.IsSystemRuntimeIntrinsicsVector64T(type.Context, type)
                 && !InteropTypes.IsSystemRuntimeIntrinsicsVector128T(type.Context, type)
                 && !InteropTypes.IsSystemRuntimeIntrinsicsVector256T(type.Context, type)
+                && !InteropTypes.IsSystemRuntimeIntrinsicsVector512T(type.Context, type)
                 && !InteropTypes.IsSystemNumericsVectorT(type.Context, type);
         }
 

src/coreclr/tools/Common/TypeSystem/Interop/InteropTypes.cs

@@ -145,6 +145,11 @@ public static bool IsSystemRuntimeIntrinsicsVector256T(TypeSystemContext context
             return IsCoreNamedType(context, type, "System.Runtime.Intrinsics", "Vector256`1");
         }
 
+        public static bool IsSystemRuntimeIntrinsicsVector512T(TypeSystemContext context, TypeDesc type)
+        {
+            return IsCoreNamedType(context, type, "System.Runtime.Intrinsics", "Vector512`1");
+        }
+
         public static bool IsSystemNumericsVectorT(TypeSystemContext context, TypeDesc type)
         {
             return IsCoreNamedType(context, type, "System.Numerics", "Vector`1");

src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/VectorOfTFieldLayoutAlgorithm.cs

@@ -36,6 +36,10 @@ public override ComputedInstanceFieldLayout ComputeInstanceLayout(DefType defTyp
             {
                 instanceFieldSize = new LayoutInt(32);
             }
+            else if (targetDetails.MaximumSimdVectorLength == SimdVectorLength.Vector512Bit)
+            {
+                instanceFieldSize = new LayoutInt(64);
+            }
             else
             {
                 Debug.Assert(targetDetails.MaximumSimdVectorLength == SimdVectorLength.None);

src/coreclr/tools/aot/ILCompiler.ReadyToRun/Compiler/ReadyToRunCompilerContext.cs

@@ -52,6 +52,8 @@ public ReadyToRunCompilerContext(TargetDetails details, SharedGenericsMode gener
                 matchingVectorType = "Vector128`1";
             else if (details.MaximumSimdVectorLength == SimdVectorLength.Vector256Bit)
                 matchingVectorType = "Vector256`1";
+            else if (details.MaximumSimdVectorLength == SimdVectorLength.Vector512Bit)
+                matchingVectorType = "Vector512`1";
 
             // No architecture has completely stable handling of Vector<T> in the abi (Arm64 may change to SVE)
             _vectorOfTFieldLayoutAlgorithm = new VectorOfTFieldLayoutAlgorithm(_r2rFieldLayoutAlgorithm, _vectorFieldLayoutAlgorithm, matchingVectorType, bubbleIncludesCorelib);

src/coreclr/tools/aot/ILCompiler.TypeSystem.Tests/CoreTestAssembly/InstanceFieldLayout.cs

@@ -230,6 +230,18 @@ public class Class16Align
     {
         Vector128<byte> vector16Align;
     }
+
+    [StructLayout(LayoutKind.Sequential)]
+    public class Class32Align
+    {
+        Vector256<byte> vector32Align;
+    }
+
+    [StructLayout(LayoutKind.Sequential)]
+    public class Class64Align
+    {
+        Vector512<byte> vector64Align;
+    }
 }
 
 namespace Auto
@@ -358,17 +370,53 @@ public struct int8x16x2
         public Vector128<byte> _1;
     }
 
+    [StructLayout(LayoutKind.Auto)]
+    public struct int8x32x2
+    {
+        public Vector256<byte> _0;
+        public Vector256<byte> _1;
+    }
+
+    [StructLayout(LayoutKind.Auto)]
+    public struct int8x64x2
+    {
+        public Vector512<byte> _0;
+        public Vector512<byte> _1;
+    }
+
     public struct Wrapper_int8x16x2
     {
         public int8x16x2 fld;
     }
 
+    public struct Wrapper_int8x32x2
+    {
+        public int8x32x2 fld;
+    }
+
+    public struct Wrapper_int8x64x2
+    {
+        public int8x64x2 fld;
+    }
+
     public struct Wrapper_int8x16x2_2
     {
         public bool fld1;
         public int8x16x2 fld2;
     }
 
+    public struct Wrapper_int8x32x2_2
+    {
+        public bool fld1;
+        public int8x32x2 fld2;
+    }
+
+    public struct Wrapper_int8x64x2_2
+    {
+        public bool fld1;
+        public int8x64x2 fld2;
+    }
+
     [StructLayout(LayoutKind.Auto)]
     public struct StructByte
     {
@@ -453,6 +501,18 @@ public class Class16Align
     {
         Vector128<byte> vector16Align;
     }
+
+    [StructLayout(LayoutKind.Sequential)]
+    public class Class32Align
+    {
+        Vector256<byte> vector32Align;
+    }
+
+    [StructLayout(LayoutKind.Sequential)]
+    public class Class64Align
+    {
+        Vector512<byte> vector64Align;
+    }
 }
 
 namespace IsByRefLike