Skip to content

[release/6.0] Port #58410: Fix zero initialization use of "initReg" #62207

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Dec 15, 2021
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 7 additions & 5 deletions src/coreclr/jit/codegencommon.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -486,13 +486,14 @@ regMaskTP CodeGenInterface::genGetRegMask(const LclVarDsc* varDsc)

assert(varDsc->lvIsInReg());

if (varTypeUsesFloatReg(varDsc->TypeGet()))
regNumber reg = varDsc->GetRegNum();
if (genIsValidFloatReg(reg))
{
regMask = genRegMaskFloat(varDsc->GetRegNum(), varDsc->TypeGet());
regMask = genRegMaskFloat(reg, varDsc->GetRegisterType());
}
else
{
regMask = genRegMask(varDsc->GetRegNum());
regMask = genRegMask(reg);
}
return regMask;
}
Expand Down Expand Up @@ -7148,8 +7149,9 @@ void CodeGen::genFnProlog()

if (isInReg)
{
regMaskTP regMask = genRegMask(varDsc->GetRegNum());
if (!varDsc->IsFloatRegType())
regNumber regForVar = varDsc->GetRegNum();
regMaskTP regMask = genRegMask(regForVar);
if (!genIsValidFloatReg(regForVar))
{
initRegs |= regMask;

Expand Down
11 changes: 4 additions & 7 deletions src/coreclr/jit/codegenlinear.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -51,19 +51,16 @@ void CodeGen::genInitializeRegisterState()
continue;
}

// Is this a floating-point argument?
if (varDsc->IsFloatRegType())
if (varDsc->lvAddrExposed)
{
continue;
}

noway_assert(!varTypeUsesFloatReg(varDsc->TypeGet()));

// Mark the register as holding the variable
assert(varDsc->GetRegNum() != REG_STK);
if (!varDsc->lvAddrExposed)
regNumber reg = varDsc->GetRegNum();
if (genIsValidIntReg(reg))
{
regSet.verifyRegUsed(varDsc->GetRegNum());
regSet.verifyRegUsed(reg);
}
}
}
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/compiler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2170,7 +2170,7 @@ VarName Compiler::compVarName(regNumber reg, bool isFloatReg)
/* If the variable is not in a register, or not in the register we're looking for, quit. */
/* Also, if it is a compiler generated variable (i.e. slot# > info.compVarScopesCount), don't bother. */
if ((varDsc->lvRegister != 0) && (varDsc->GetRegNum() == reg) &&
(varDsc->IsFloatRegType() || !isFloatReg) && (varDsc->lvSlotNum < info.compVarScopesCount))
(varDsc->lvSlotNum < info.compVarScopesCount))
{
/* check if variable in that register is live */
if (VarSetOps::IsMember(this, compCurLife, varDsc->lvVarIndex))
Expand Down
4 changes: 0 additions & 4 deletions src/coreclr/jit/compiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -961,10 +961,6 @@ class LclVarDsc
Compiler* pComp,
RefCountState state = RCS_NORMAL,
bool propagate = true);
bool IsFloatRegType() const
{
return varTypeUsesFloatReg(lvType) || lvIsHfaRegArg();
}

var_types GetHfaType() const
{
Expand Down