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Delete mov_i2xmm and mov_xmm2i. #47843

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merged 4 commits into from
Feb 9, 2021
Merged

Delete mov_i2xmm and mov_xmm2i. #47843

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c1c0b55
Delete mov_i2xmm and mov_xmm2i.
Feb 4, 2021
6c1c7dc
Delete `ins_CopyFloatToInt`.
Feb 4, 2021
c9357cb
Delete 'ins_CopyIntToFloat'.
Feb 4, 2021
f8d86a5
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Feb 8, 2021
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2 changes: 0 additions & 2 deletions src/coreclr/jit/codegen.h
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Original file line number Diff line number Diff line change
Expand Up @@ -1455,8 +1455,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

instruction ins_Copy(var_types dstType);
instruction ins_Copy(regNumber srcReg, var_types dstType);
instruction ins_CopyIntToFloat(var_types srcType, var_types dstTyp);
instruction ins_CopyFloatToInt(var_types srcType, var_types dstTyp);
static instruction ins_FloatStore(var_types type = TYP_DOUBLE);
static instruction ins_FloatCopy(var_types type = TYP_DOUBLE);
instruction ins_FloatConv(var_types to, var_types from);
Expand Down
47 changes: 5 additions & 42 deletions src/coreclr/jit/codegencommon.cpp
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Expand Up @@ -4437,17 +4437,7 @@ void CodeGen::genFnPrologCalleeRegArgs(regNumber xtraReg, bool* pXtraRegClobbere
}
#endif
instruction copyIns = ins_Copy(regNum, destMemType);
#if defined(TARGET_XARCH)
// For INS_mov_xmm2i, the source xmm reg comes first.
if (copyIns == INS_mov_xmm2i)
{
GetEmitter()->emitIns_R_R(copyIns, size, regNum, destRegNum);
}
else
#endif // TARGET_XARCH
{
GetEmitter()->emitIns_R_R(copyIns, size, destRegNum, regNum);
}
GetEmitter()->emitIns_R_R(copyIns, size, destRegNum, regNum);
#ifdef USING_SCOPE_INFO
psiMoveToReg(varNum);
#endif // USING_SCOPE_INFO
Expand Down Expand Up @@ -12067,42 +12057,15 @@ void CodeGen::genRegCopy(GenTree* treeNode)
}
return;
}

regNumber srcReg = genConsumeReg(op1);
var_types targetType = treeNode->TypeGet();
regNumber targetReg = treeNode->GetRegNum();
assert(srcReg != REG_NA);
assert(targetReg != REG_NA);
assert(targetType != TYP_STRUCT);

// Check whether this node and the node from which we're copying the value have
// different register types. This can happen if (currently iff) we have a SIMD
// vector type that fits in an integer register, in which case it is passed as
// an argument, or returned from a call, in an integer register and must be
// copied if it's in an xmm register.

bool srcFltReg = (varTypeUsesFloatReg(op1));
bool tgtFltReg = (varTypeUsesFloatReg(treeNode));
if (srcFltReg != tgtFltReg)
{
instruction ins;
regNumber fpReg;
regNumber intReg;
if (tgtFltReg)
{
ins = ins_CopyIntToFloat(op1->TypeGet(), treeNode->TypeGet());
fpReg = targetReg;
intReg = op1->GetRegNum();
}
else
{
ins = ins_CopyFloatToInt(op1->TypeGet(), treeNode->TypeGet());
intReg = targetReg;
fpReg = op1->GetRegNum();
}
inst_RV_RV(ins, fpReg, intReg, targetType);
}
else
{
inst_RV_RV(ins_Copy(targetType), targetReg, genConsumeReg(op1), targetType);
}
inst_RV_RV(ins_Copy(srcReg, targetType), targetReg, srcReg, targetType);

if (op1->IsLocal())
{
Expand Down
45 changes: 14 additions & 31 deletions src/coreclr/jit/codegenxarch.cpp
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Expand Up @@ -2743,7 +2743,7 @@ void CodeGen::genCodeForInitBlkUnroll(GenTreeBlk* node)
}
else
{
emit->emitIns_R_R(INS_mov_i2xmm, EA_PTRSIZE, srcXmmReg, srcIntReg);
emit->emitIns_R_R(INS_movd, EA_PTRSIZE, srcXmmReg, srcIntReg);
emit->emitIns_R_R(INS_punpckldq, EA_16BYTE, srcXmmReg, srcXmmReg);
#ifdef TARGET_X86
// For x86, we need one more to convert it from 8 bytes to 16 bytes.
Expand Down Expand Up @@ -5039,9 +5039,9 @@ void CodeGen::genCallInstruction(GenTreeCall* call)
// integer and floating point registers so, let's do that.
if (call->IsVarargs() && varTypeIsFloating(argNode))
{
regNumber targetReg = compiler->getCallArgIntRegister(argNode->GetRegNum());
instruction ins = ins_CopyFloatToInt(argNode->TypeGet(), TYP_LONG);
inst_RV_RV(ins, argNode->GetRegNum(), targetReg);
regNumber srcReg = argNode->GetRegNum();
regNumber targetReg = compiler->getCallArgIntRegister(argNode->GetRegNum());
inst_RV_RV(ins_Copy(srcReg, TYP_LONG), targetReg, srcReg);
}
#endif // FEATURE_VARARG
}
Expand Down Expand Up @@ -5783,9 +5783,8 @@ void CodeGen::genJmpMethod(GenTree* jmp)

if (varTypeIsFloating(loadType))
{
intArgReg = compiler->getCallArgIntRegister(argReg);
instruction ins = ins_CopyFloatToInt(loadType, TYP_LONG);
inst_RV_RV(ins, argReg, intArgReg, loadType);
intArgReg = compiler->getCallArgIntRegister(argReg);
inst_RV_RV(ins_Copy(argReg, TYP_LONG), intArgReg, argReg, loadType);
}
else
{
Expand Down Expand Up @@ -5824,7 +5823,6 @@ void CodeGen::genJmpMethod(GenTree* jmp)
regMaskTP remainingIntArgMask = RBM_ARG_REGS & ~fixedIntArgMask;
if (remainingIntArgMask != RBM_NONE)
{
instruction insCopyIntToFloat = ins_CopyIntToFloat(TYP_LONG, TYP_DOUBLE);
GetEmitter()->emitDisableGC();
for (int argNum = 0, argOffset = 0; argNum < MAX_REG_ARG; ++argNum)
{
Expand All @@ -5838,7 +5836,7 @@ void CodeGen::genJmpMethod(GenTree* jmp)

// also load it in corresponding float arg reg
regNumber floatReg = compiler->getCallArgFloatRegister(argReg);
inst_RV_RV(insCopyIntToFloat, floatReg, argReg);
inst_RV_RV(ins_Copy(argReg, TYP_DOUBLE), floatReg, argReg);
}

argOffset += REGSIZE_BYTES;
Expand Down Expand Up @@ -6591,8 +6589,9 @@ void CodeGen::genCkfinite(GenTree* treeNode)
// Copy the floating-point value to an integer register. If we copied a float to a long, then
// right-shift the value so the high 32 bits of the floating-point value sit in the low 32
// bits of the integer register.
instruction ins = ins_CopyFloatToInt(targetType, (targetType == TYP_FLOAT) ? TYP_INT : TYP_LONG);
inst_RV_RV(ins, op1->GetRegNum(), tmpReg, targetType);
regNumber srcReg = op1->GetRegNum();
var_types targetIntType = ((targetType == TYP_FLOAT) ? TYP_INT : TYP_LONG);
inst_RV_RV(ins_Copy(srcReg, targetIntType), tmpReg, srcReg, targetType);
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if (targetType == TYP_DOUBLE)
{
// right shift by 32 bits to get to exponent.
Expand Down Expand Up @@ -6661,7 +6660,7 @@ void CodeGen::genCkfinite(GenTree* treeNode)

// Copy only the low 32 bits. This will be the high order 32 bits of the floating-point
// value, no matter the floating-point type.
inst_RV_RV(ins_CopyFloatToInt(TYP_FLOAT, TYP_INT), copyToTmpSrcReg, tmpReg, TYP_FLOAT);
inst_RV_RV(ins_Copy(copyToTmpSrcReg, TYP_INT), tmpReg, copyToTmpSrcReg, TYP_FLOAT);

// Mask exponent with all 1's and check if the exponent is all 1's
inst_RV_IV(INS_and, tmpReg, expMask, EA_4BYTE);
Expand Down Expand Up @@ -7082,22 +7081,7 @@ void CodeGen::genBitCast(var_types targetType, regNumber targetReg, var_types sr
assert(dstFltReg == genIsValidFloatReg(targetReg));
if (srcFltReg != dstFltReg)
{
instruction ins;
regNumber fltReg;
regNumber intReg;
if (dstFltReg)
{
ins = ins_CopyIntToFloat(srcType, targetType);
fltReg = targetReg;
intReg = srcReg;
}
else
{
ins = ins_CopyFloatToInt(srcType, targetType);
intReg = targetReg;
fltReg = srcReg;
}
inst_RV_RV(ins, fltReg, intReg, targetType);
inst_RV_RV(ins_Copy(srcReg, targetType), targetReg, srcReg, targetType);
}
else if (targetReg != srcReg)
{
Expand Down Expand Up @@ -8760,9 +8744,8 @@ void CodeGen::genProfilingEnterCallback(regNumber initReg, bool* pInitRegZeroed)
#if FEATURE_VARARG
if (compiler->info.compIsVarArgs && varTypeIsFloating(loadType))
{
regNumber intArgReg = compiler->getCallArgIntRegister(argReg);
instruction ins = ins_CopyFloatToInt(loadType, TYP_LONG);
inst_RV_RV(ins, argReg, intArgReg, loadType);
regNumber intArgReg = compiler->getCallArgIntRegister(argReg);
inst_RV_RV(ins_Copy(argReg, TYP_LONG), intArgReg, argReg, loadType);
}
#endif // FEATURE_VARARG
}
Expand Down
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