Disable HAS_MORE_THAN_64_REGISTERS until we add complete support #103146
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a74nh
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Jun 7, 2024
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Without this I get
Assert failure(PID 2595598 [0x00279b0e], Thread: 2595598 [0x279b0e]): Assertion failed '(unsigned)regNum < ArrLen(physRegs)' in 'JIT.HardwareIntrinsics.Arm._Sve.SveGatherVectorVectorBasesTest__Sve_GatherVector_Indices_float_int:RunBasicScenario_UnsafeRead():this' during 'LSRA build intervals' (IL size 132; hash 0x163ac2a9; Tier0)
File: /home/alahay01/dotnet/runtime_sve_api/src/coreclr/jit/lsra.cpp:468
Image: /home/alahay01/dotnet/runtime_sve_api/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun
When running any of the Sve tests.
Approved as it's blocking me.
TIHan
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LGTM. This is what I was experiencing too in the prefetch pr.
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We should just disable this until we add complete support for more than 64 registers because we might start operating on
highalthough we do not have corresponding registers.