Skip to content

CoreCLR RISC-V architecture port #84834

Open
@gbalykov

Description

Current status

Our initial goal was to get to 100% pass rate for CodeGen BringUp tests in Debug mode. We've achieved this both on qemu and on StarFive VisionFive2 board.

For this, all changes are currenlty in PRs created by my colleagues @clamp03 @t-mustafin:

So, when all of the above are merged, CodeGen BringUp tests launched on main branch should pass both on VisionFive2 and qemu (for StarFive VisionFive2 board GC_REGIONS also need to be disabled currently, we are already investigating this).

Current test results for full JIT directory on VisionFive2 in Debug with DOTNET_GCgen0size=99999999:

# Tests Discovered : 4737
# Passed           : 4304
# Failed           : 413
# Skipped          : 20

Current test results for all tests on VisionFive2 in Debug with DOTNET_GCgen0size=99999999:

# Tests Discovered : 6565
# Passed           : 5663
# Failed           : 861
# Skipped          : 41

Further plans

Our further plans for near future:

  • focus on full JIT tests directory to make tests pass in Release/Debug/Checked mode and with/without DOTNET_GCgen0size=99999999
  • fix TODOs, which are not related to jit optimizations
  • add build CI in dotnet/runtime repo for RISC-V
  • add CI in dotnet/runtime repo for RISC-V with some tests run on qemu
  • enable JitDisasm and JitDump
  • fix or disable GC_REGIONS on VisionFive2
  • focus on more tests dirs with Release/Debug/Checked build of runtime after all of the above
  • focus on libraries (corefx) tests to make innerloop/outerloop tests pass
  • jitstress, jitstressregs, gcstress testing

What's currently not in our plans for near future:

  • full jit optimizations with all optimization passes (i.e. disabled MinOpt, tiered compilation, etc.)
  • optimizations of codegen itself
  • crossgen2 support
  • SIMD and intrinsics support
  • GC (not sure about this yet, need to check current status without DOTNET_GCgen0size=99999999 and with/without FEATURE_CONSERVATIVE_GC)
  • EH, stackwalking, and interop portions (also not sure, need to check current status)
  • stubs optimizations, GC optimizations, etc.

Process

In overall, we basically follow https://github.com/dotnet/runtime/blob/main/docs/design/coreclr/jit/porting-ryujit.md and https://github.com/dotnet/runtime/blob/main/docs/design/coreclr/botr/guide-for-porting.md. We categorize failing tests by error type. Soon we'll open separate issue on what's currently being worked on.

Related issues

#36748, #75749

Activity

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Metadata

Assignees

No one assigned

    Labels

    arch-riscvRelated to the RISC-V architecturearea-Metahelp wanted[up-for-grabs] Good issue for external contributors

    Type

    No type

    Projects

    No projects

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions