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lines changed Original file line number Diff line number Diff line change @@ -761,6 +761,18 @@ REDHAWK_PALIMPORT void REDHAWK_PALAPI PAL_GetCpuCapabilityFlags(int* flags)
761761{
762762    *flags = 0 ;
763763
764+ //  Older version of SDK would return false for these intrinsics
765+ //  but make sure we pass the right values to the APIs
766+ #ifndef  PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE
767+ #define  PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE  34 
768+ #endif 
769+ #ifndef  PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE
770+ #define  PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE  43 
771+ #endif 
772+ #ifndef  PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE
773+ #define  PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE  45 
774+ #endif 
775+ 
764776    //  FP and SIMD support are enabled by default
765777    *flags |= ARM64IntrinsicConstants_AdvSimd;
766778
@@ -780,6 +792,16 @@ REDHAWK_PALIMPORT void REDHAWK_PALAPI PAL_GetCpuCapabilityFlags(int* flags)
780792    {
781793        *flags |= ARM64IntrinsicConstants_Atomics;
782794    }
795+ 
796+     if  (IsProcessorFeaturePresent (PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE))
797+     {
798+         *flags |= ARM64IntrinsicConstants_Dp;
799+     }
800+ 
801+     if  (IsProcessorFeaturePresent (PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE))
802+     {
803+         *flags |= ARM64IntrinsicConstants_Rcpc;
804+     }
783805}
784806
785807#endif 
Original file line number Diff line number Diff line change @@ -1656,7 +1656,10 @@ void EEJitManager::SetCpuInfo()
16561656#define  PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE  34 
16571657#endif 
16581658#ifndef  PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE
1659- # define  PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE  43 
1659+ #define  PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE  43 
1660+ #endif 
1661+ #ifndef  PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE
1662+ #define  PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE  45 
16601663#endif 
16611664
16621665    //  PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE (34)
@@ -1671,6 +1674,12 @@ void EEJitManager::SetCpuInfo()
16711674        CPUCompileFlags.Set (InstructionSet_Dp);
16721675    }
16731676
1677+     //  PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE (45)
1678+     if  (IsProcessorFeaturePresent (PF_ARM_V83_LRCPC_INSTRUCTIONS_AVAILABLE))
1679+     {
1680+         CPUCompileFlags.Set (InstructionSet_Rcpc);
1681+     }
1682+ 
16741683#endif  //  HOST_64BIT
16751684    if  (GetDataCacheZeroIDReg () == 4 )
16761685    {
 
 
   
 
     
   
   
          
    
    
     
    
      
     
     
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