[wasm] Implement Vector128.Abs intrinsics (#78067)

* [wasm] Implement Vector128.Abs intrinsics

C# code

    iv = Vector128.Abs(Vector128.Create(System.Random.Shared.Next()));
    fv = Vector128.Abs(Vector128.Create(System.Random.Shared.NextSingle()));
    dv = Vector128.Abs(Vector128.Create(System.Random.Shared.NextDouble()));

is emitted as:

    ...
    i32x4.splat    [SIMD]
    i32x4.abs    [SIMD]
    v128.store offset:16    [SIMD]
    ...
    f32x4.splat    [SIMD]
    f32x4.abs    [SIMD]
    v128.store    [SIMD]
    ...
    f64x2.splat    [SIMD]
    f64x2.abs    [SIMD]
    v128.store offset:80    [SIMD]
    ...

* Review feedback

Author: radekdoulik

src/mono/mono/mini/llvm-intrinsics.h

@@ -261,6 +261,8 @@ INTRINS_OVR(WASM_BITMASK_V16, wasm_bitmask, Wasm, sse_i1_t)
 INTRINS_OVR(WASM_BITMASK_V8, wasm_bitmask, Wasm, sse_i2_t)
 INTRINS_OVR(WASM_BITMASK_V4, wasm_bitmask, Wasm, sse_i4_t)
 INTRINS_OVR(WASM_BITMASK_V2, wasm_bitmask, Wasm, sse_i8_t)
+INTRINS_OVR(WASM_FABS_V4, fabs, Generic, sse_r4_t)
+INTRINS_OVR(WASM_FABS_V2, fabs, Generic, sse_r8_t)
 INTRINS(WASM_DOT, wasm_dot, Wasm)
 INTRINS(WASM_SHUFFLE, wasm_shuffle, Wasm)
 INTRINS(WASM_SWIZZLE, wasm_swizzle, Wasm)

src/mono/mono/mini/mini-llvm.c

@@ -9289,18 +9289,6 @@ MONO_RESTORE_WARNING
 			break;
 		}
 
-		case OP_VECTOR_IABS: {
-			// %sub = sub <16 x i8> zeroinitializer, %arg
-			// %cmp = icmp sgt <16 x i8> %arg, zeroinitializer
-			// %abs = select <16 x i1> %cmp, <16 x i8> %arg, <16 x i8> %sub
-			LLVMTypeRef typ = type_to_sse_type (ins->inst_c1);
-			LLVMValueRef sub = LLVMBuildSub(builder, LLVMConstNull(typ), lhs, "");
-			LLVMValueRef cmp = LLVMBuildICmp(builder, LLVMIntSGT, lhs, LLVMConstNull(typ), "");
-			LLVMValueRef abs = LLVMBuildSelect (builder, cmp, lhs, sub, "");
-			values [ins->dreg] = convert (ctx, abs, typ);
-			break;
-		}
-
 		case OP_SSSE3_ALIGNR: {
 			LLVMTypeRef ret_t = simd_class_to_llvm_type (ctx, ins->klass);
 			LLVMValueRef zero = LLVMConstNull (v128_i1_t);
@@ -9605,6 +9593,20 @@ MONO_RESTORE_WARNING
 		}
 #endif
 
+#if defined(TARGET_X86) || defined(TARGET_AMD64) || defined(TARGET_WASM)
+		case OP_VECTOR_IABS: {
+			// %sub = sub <16 x i8> zeroinitializer, %arg
+			// %cmp = icmp sgt <16 x i8> %arg, zeroinitializer
+			// %abs = select <16 x i1> %cmp, <16 x i8> %arg, <16 x i8> %sub
+			LLVMTypeRef typ = type_to_sse_type (ins->inst_c1);
+			LLVMValueRef sub = LLVMBuildSub(builder, LLVMConstNull(typ), lhs, "");
+			LLVMValueRef cmp = LLVMBuildICmp(builder, LLVMIntSGT, lhs, LLVMConstNull(typ), "");
+			LLVMValueRef abs = LLVMBuildSelect (builder, cmp, lhs, sub, "");
+			values [ins->dreg] = convert (ctx, abs, typ);
+			break;
+		}
+#endif
+
 		case OP_XCOMPARE_FP: {
 			LLVMRealPredicate pred = fpcond_to_llvm_cond [ins->inst_c0];
 			LLVMValueRef cmp = LLVMBuildFCmp (builder, pred, lhs, rhs, "");

src/mono/mono/mini/simd-intrinsics.c

@@ -1157,6 +1157,12 @@ emit_sri_vector (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsi
 		} else {
 			return emit_simd_ins_for_sig (cfg, klass, OP_VECTOR_IABS, -1, arg0_type, fsig, args);
 		}
+#elif defined(TARGET_WASM)
+		if (type_enum_is_float(arg0_type)) {
+			return emit_simd_ins_for_sig (cfg, klass, OP_XOP_X_X, arg0_type == MONO_TYPE_R8 ? INTRINS_WASM_FABS_V2 : INTRINS_WASM_FABS_V4, -1, fsig, args);
+		} else {
+			return emit_simd_ins_for_sig (cfg, klass, OP_VECTOR_IABS, -1, arg0_type, fsig, args);
+		}
 #else
 		return NULL;
 #endif