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Cross-bitness in ZapRelocs #18665

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merged 9 commits into from
Jun 27, 2018
Merged

Cross-bitness in ZapRelocs #18665

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24909ce
Cast to UINT32 to avoid warnings on Windows in ZapBaseRelocs::WriteRe…
echesakov Jun 15, 2018
c81e6fa
Replace TADDR with DWORD in ZapInfo::recordRelocation IMAGE_REL_BASED…
echesakov Jun 26, 2018
114ce95
Replace sizeof(cell) with TARGET_POINTER_SIZE in src/zap/zapimport.cpp
echesakov Jun 26, 2018
dd2ba39
Replace TADDR with DWORD in ZapBaseRelocs::WriteReloc IMAGE_REL_BASED…
echesakov Jun 26, 2018
72ed9a0
Define target_size_t type
echesakov Jun 27, 2018
d4da318
Replace TADDR with target_size_t in ZapInfo::recordRelocation in src/…
echesakov Jun 27, 2018
cccaeb9
Replace SIZE_T PVOID with target_size_t in src/zap/zapimport.cpp
echesakov Jun 27, 2018
3e31e6b
Replace TADDR with target_size_t in src/zap/zaprelocs.cpp
echesakov Jun 27, 2018
a3dc6bc
Rename target_size_t to TARGET_POINTER_TYPE
echesakov Jun 27, 2018
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6 changes: 6 additions & 0 deletions src/zap/common.h
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Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,12 @@
#endif
#endif // !_TARGET_X86_ || FEATURE_PAL

#ifdef _TARGET_64BIT_
typedef unsigned __int64 TARGET_POINTER_TYPE;
#else
typedef unsigned int TARGET_POINTER_TYPE;
#endif

#include "utilcode.h"
#include "corjit.h"
#include "jithost.h"
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10 changes: 5 additions & 5 deletions src/zap/zapimport.cpp
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Expand Up @@ -362,12 +362,12 @@ void ZapImport::Save(ZapWriter * pZapWriter)
{
if (IsReadyToRunCompilation())
{
SIZE_T value = 0;
TARGET_POINTER_TYPE value = 0;
pZapWriter->Write(&value, sizeof(value));
return;
}

SIZE_T token = CORCOMPILE_TAG_TOKEN(GetBlob()->GetRVA());
TARGET_POINTER_TYPE token = CORCOMPILE_TAG_TOKEN(GetBlob()->GetRVA());
pZapWriter->Write(&token, sizeof(token));
}

Expand Down Expand Up @@ -639,7 +639,7 @@ class ZapStubDispatchCell : public ZapImport
{
ZapImage * pImage = ZapImage::GetImage(pZapWriter);

PVOID cell;
TARGET_POINTER_TYPE cell;
pImage->WriteReloc(&cell, 0, m_pDelayLoadHelper, 0, IMAGE_REL_BASED_PTR);
pZapWriter->Write(&cell, sizeof(cell));
}
Expand Down Expand Up @@ -745,7 +745,7 @@ class ZapExternalMethodCell : public ZapImport
{
ZapImage * pImage = ZapImage::GetImage(pZapWriter);

PVOID cell;
TARGET_POINTER_TYPE cell;
pImage->WriteReloc(&cell, 0, m_pDelayLoadHelper, 0, IMAGE_REL_BASED_PTR);
pZapWriter->Write(&cell, sizeof(cell));
}
Expand Down Expand Up @@ -1725,7 +1725,7 @@ class ZapDynamicHelperCell : public ZapImport
{
ZapImage * pImage = ZapImage::GetImage(pZapWriter);

PVOID cell;
TARGET_POINTER_TYPE cell;
pImage->WriteReloc(&cell, 0, m_pDelayLoadHelper, 0, IMAGE_REL_BASED_PTR);
pZapWriter->Write(&cell, sizeof(cell));
}
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2 changes: 1 addition & 1 deletion src/zap/zapinfo.cpp
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Expand Up @@ -2574,7 +2574,7 @@ void ZapInfo::recordRelocation(void *location, void *target,
break;

case IMAGE_REL_BASED_PTR:
*(UNALIGNED TADDR *)location = (TADDR)targetOffset;
*(UNALIGNED TARGET_POINTER_TYPE *)location = (TARGET_POINTER_TYPE)targetOffset;
break;

#if defined(_TARGET_X86_) || defined(_TARGET_AMD64_)
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6 changes: 3 additions & 3 deletions src/zap/zaprelocs.cpp
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Expand Up @@ -48,7 +48,7 @@ void ZapBaseRelocs::WriteReloc(PVOID pSrc, int offset, ZapNode * pTarget, int ta
// Misaligned relocs disable ASLR on ARM. We should never ever emit them.
_ASSERTE(IS_ALIGNED(rva, TARGET_POINTER_SIZE));
#endif
*(UNALIGNED TADDR *)pLocation = pActualTarget;
*(UNALIGNED TARGET_POINTER_TYPE *)pLocation = (TARGET_POINTER_TYPE)pActualTarget;
break;

case IMAGE_REL_BASED_RELPTR:
Expand Down Expand Up @@ -92,7 +92,7 @@ void ZapBaseRelocs::WriteReloc(PVOID pSrc, int offset, ZapNode * pTarget, int ta
// description of IMAGE_REL_BASED_REL_THUMB_MOV32_PCREL
const UINT32 offsetCorrection = 12;

UINT32 imm32 = pActualTarget - (pSite + offsetCorrection);
UINT32 imm32 = UINT32(pActualTarget - (pSite + offsetCorrection));

PutThumb2Mov32((UINT16 *)pLocation, imm32);

Expand Down Expand Up @@ -122,7 +122,7 @@ void ZapBaseRelocs::WriteReloc(PVOID pSrc, int offset, ZapNode * pTarget, int ta
}
// IMAGE_REL_BASED_THUMB_BRANCH24 does not need base reloc entry
return;
#endif
#endif // defined(_TARGET_ARM_)
#if defined(_TARGET_ARM64_)
case IMAGE_REL_ARM64_BRANCH26:
{
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