v5.11.4-mb Memory barriers as assumed by the original driver code

There are number of places in the original driver code relying on memory barriers: full (mb macro), read (rmb) and write (wmb), i.e. for example igb_clean_tx_irq(). All of these macros were historically empty. I've just adjusted them to rely on stdatomic's atomic_thread_fence presumably doing what is necessary. Please let me know if this helps on X570

#define wmb() atomic_thread_fence(memory_order_release)
#define rmb() atomic_thread_fence(memory_order_acquire)
#define mb() atomic_thread_fence(memory_order_seq_cst)