README.md

VerilogProject

Tools:- Iverilog, GTKWAVE, notepadqq

In this project all the following logic circuits will be added-

• [or gate]
• [and gate]
• [not gate]
• [xor gate]
• [nor gate]
• [nand gate]
• ...

How to run a verilog file (.v) in iverilog?

Lets try in terminal for that write a verilog code, change the directory where it is located do the following-

>> iverilog -o testbenchfilename.vvp testbenchfilename.v
>> vvp testbenchfilename.vvp 
>> gtkwave

How to use the basic gate folders uploaded in this repo?

Lets try in terminal for that, download any of the folder, change the directory where it is downloaded do the following-

>> gtkwave