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introduce verilog_sva_property_typet #1081

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This introduces a type for Verilog SVA properties To distinguish properties from state predicates and sequences.

This introduces a type for Verilog SVA properties To distinguish properties
from state predicates and sequences.
@kroening kroening force-pushed the verilog_sva_property_type branch from 9e75065 to d6241f6 Compare April 23, 2025 16:40
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