[8600G] Ryzen C States Are Zero > C1

[EUA]

Hi,
Thanks for great program.
I got Ryzen 1700 with B350 MB. I enabled deep sleep at bios etc...
I tried to do everything but don't have any success.

corefreq only shows Turbo, C0 and C1 states.
It shown at program that (CC6 & PC6 green) but C3/C6/C7 counters are always zero at frequency and Idle C-states view.

--- Freq(MHz) Ratio - Turbo --- C0 ---- C1 ---- C3 ---- C6 ---- C7 --Min TMP Max ----
#0   180.76 ( 2.29)   6.04%   6.87%  93.13%   0.00%   0.00%   0.00%  0  /  0/  0
#1   115.44 ( 1.16)   3.04%   3.92%  96.08%   0.00%   0.00%   0.00%  0  /  0/  0
#2   190.43 ( 1.91)   5.02%   7.40%  92.60%   0.00%   0.00%   0.00%  0  /  0/  0
#3   319.41 ( 3.20)   8.42%  11.72%  88.28%   0.00%   0.00%   0.00%  0  /  0/  0
...

Why does C3/C6/C7 states not supported by CoreFreq?

PS: using cpupower monitor give this result.

    | Mperf              || Idle_Stats         
 CPU| C0   | Cx   | Freq  || POLL | C1   | C2    
   0|  7,33| 92,67|  1794||  0,00|  4,37| 88,32
   1|  3,91| 96,09|  1954||  0,00|  6,44| 89,58
   2|  3,52| 96,48|  1702||  0,00|  7,90| 88,86
...

[cyring]

Hello,

C3/C6/C7 are implemented for Intel Processors only.
The UI just shows the placeholder for counters as zero.

It might be feasible to read above C3 but I don't read those counters specifications in AMD Zen doc.

CC6 & PC6 are undocumented bits. See project ZenState

C2 is something I have to look at...

[cyring]

Based on cpuidle.c source code, can you print :

cat /sys/devices/system/cpu/cpu0/cpuidle/state?/name

By the way, you should read the same in the 'Kernel Data' window

[EUA]

# cat /sys/devices/system/cpu/cpu0/cpuidle/state?/name
POLL
C1
C2

I think RyZen micro-code does not export all C states to Linux Kernel.

[cyring]

Is this the same with Windows software ?
Such as ThrottleStop

[EUA]

Oopps. CPU is not supported by ThrottleStop

[cyring]

Perhaps in the EFI/BIOS or the AMD software, but googling for Zen C-States doesn't show any monitoring of deep idle states.

[cyring]

I'm closing this issue but feel to try the experimental Zen overclocking @ issue #87

[cyring]

Hello,
Among the last changes in issue #195 , an I/O ASM access to the FCH have been added: can you please check if the last CoreFreq version is starting fine ?
Thank you

[EUA]

Hello. Don't know why but I missed this notifications.

My older board is broken. Will try solder new mosfets next week...

Now I have 8600G CPU. I compiled from git-trunk and saw that;
Still only C0 and C1 available while cpupower idle-info shows C2 and C3 states for my 8600G
Also at windows, HWiNFO able to show C6 states of processors proper.
CoreFreq able to show C2/3/6 is enabled:

Don't know if "I/O ASM access to the FCH" improvements are enabled supported on my board/cpu. Might be, they work on old architectures. If any data required to you for implement your program, I can send any kind of dump.

When I able to repair my AM4 board, try to run cpufreqd on it to see if there are any improvement on C states with x1700 and 5700G CPUs.
Thanks.

[cyring]

@EUA

CoreFreq able to show C2/3/6 is enabled:

Here Core C6 State and Package C6 State mean they are detected as enabled (from Registers)
However I still miss the hardware counters specification since Zen 1 to read straight from some registers the number of cycles elapsed per C-States.

With Intel processors, those values are easily read from MSR registers.
See the great article from Mete Balci: A Minimum Complete Tutorial of CPU Power Management, C-states and P-states

---

Meanwhile I had implemented software kernel counters down to C6
( make sure to pull latest commits from branch master )

Just start driver with these parameters:

insmod build/corefreqk.ko Register_ClockSource=1 Register_Governor=1 Register_CPU_Idle=1 Register_CPU_Freq=1

echo "corefreq_tsc" > /sys/devices/system/clocksource/clocksource0/current_clocksource

You can then alternate as will the idle limit from the UI window named Kernel

You will have to unload or prevent any other driver to act as CPU-Idle, CPU-Freq and ClockSource.
They have to be Missing prior registering CoreFreq

See Wiki/CoreFreq as the Clock Source, CPU Freq and CPU Idle driver

When done, please provide me, using Mardown format, the output of the following CLI

build/corefreq-cli -s -n -m -n -B -n -M -n -k -n -C 1 -n -i 1 -n -V 1 -n -W 1 -n -c 1