RISC-Processor-Simulator

Problem Statement

Design a CPU including ALUs and Register files, the Control circuitry, Instructions flow etc., on any simulator.

Project Description

We have designed a 32-Bit RISC inspired Processor with Von Neumann Architecture using Logisim. We have also developed an assembler in python which converts the assembly code into machine language.

Project Documentaion

• CPU Documentation
• Assembler Documentation
• Example Assembly Program

Project Structure

1. Detailed Report of the project.
2. A Presentation explaining various parts and features of the project.
3. A Walkthrough to help understand working of the code.
4. Actual Project here.
5. A Command line interface to interact with the project.

Team Members

• Aditya Rai 19114004
• Gagan Sharma 19114032
• Gajanan Gitte 19114033
• Raghav Somani 19114068
• Shlok Goyal 19114078
• Gaurav Wasnik 19114090

GUIDED BY

PROFESSOR Peddoju Sateesh Kumar