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mvebu: copy 5.10 patches to 5.15
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Linux 5.15 on Marvell EBU, here we go!

Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
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rsalvaterra committed Aug 16, 2022
1 parent a66f843 commit 05cd4a5
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65 changes: 65 additions & 0 deletions target/linux/mvebu/patches-5.15/001-v5.11-arm64-dts-mcbin-singleshot-add-heartbeat-LED.patch
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@@ -0,0 +1,65 @@
From da57203dc7fd556fbb3f0ec7d7d7c0b0e893b386 Mon Sep 17 00:00:00 2001
From: Tomasz Maciej Nowak <tmn505@gmail.com>
Date: Tue, 10 Nov 2020 16:38:31 +0100
Subject: [PATCH] arm64: dts: mcbin-singleshot: add heartbeat LED

With board revision 1.3, SolidRun moved the power LED to the middle of
the board. In old place of power LED a GPIO controllable heartbeat LED
was added. This commit only touches Single Shot variant, since only this
variant is all revision 1.3.

Note:
This is slightly modified patch. Some boards could be placed in an
enclosure, so the LED18 is enabled by default, since that'll be the only
visible indicator that the board is operating.

Reported-by: Alexandra Alth <alexandra@alth.de>
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
.../marvell/armada-8040-mcbin-singleshot.dts | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)

--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dts
@@ -5,6 +5,8 @@
* Device Tree file for MACCHIATOBin Armada 8040 community board platform
*/

+#include <dt-bindings/leds/common.h>
+
#include "armada-8040-mcbin.dtsi"

/ {
@@ -12,6 +14,20 @@
compatible = "marvell,armada8040-mcbin-singleshot",
"marvell,armada8040-mcbin", "marvell,armada8040",
"marvell,armada-ap806-quad", "marvell,armada-ap806";
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&cp0_led18_pins>;
+ pinctrl-names = "default";
+
+ led18 {
+ gpios = <&cp0_gpio2 1 GPIO_ACTIVE_LOW>;
+ function = LED_FUNCTION_HEARTBEAT;
+ color = <LED_COLOR_ID_GREEN>;
+ linux,default-trigger = "heartbeat";
+ default-state = "on";
+ };
+ };
};

&cp0_eth0 {
@@ -27,3 +43,10 @@
managed = "in-band-status";
sfp = <&sfp_eth1>;
};
+
+&cp0_pinctrl {
+ cp0_led18_pins: led18-pins {
+ marvell,pins = "mpp33";
+ marvell,function = "gpio";
+ };
+};
74 changes: 74 additions & 0 deletions ...linux/mvebu/patches-5.15/002-v5.11-ARM-dts-turris-omnia-enable-HW-buffer-management.patch
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From 018b88eee1a2efda26ed2f09aab33ccdc40ef18f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Sun, 15 Nov 2020 14:59:17 +0100
Subject: ARM: dts: turris-omnia: enable HW buffer management
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The buffer manager is available on Turris Omnia but needs to be
described in device-tree to be used.

Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Andreas Färber <afaerber@suse.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/armada-385-turris-omnia.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)

(limited to 'arch/arm/boot/dts/armada-385-turris-omnia.dts')

--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -84,12 +84,23 @@
};
};

+&bm {
+ status = "okay";
+};
+
+&bm_bppi {
+ status = "okay";
+};
+
/* Connected to 88E6176 switch, port 6 */
&eth0 {
pinctrl-names = "default";
pinctrl-0 = <&ge0_rgmii_pins>;
status = "okay";
phy-mode = "rgmii";
+ buffer-manager = <&bm>;
+ bm,pool-long = <0>;
+ bm,pool-short = <3>;

fixed-link {
speed = <1000>;
@@ -103,6 +114,9 @@
pinctrl-0 = <&ge1_rgmii_pins>;
status = "okay";
phy-mode = "rgmii";
+ buffer-manager = <&bm>;
+ bm,pool-long = <1>;
+ bm,pool-short = <3>;

fixed-link {
speed = <1000>;
@@ -115,6 +129,9 @@
status = "okay";
phy-mode = "sgmii";
phy = <&phy1>;
+ buffer-manager = <&bm>;
+ bm,pool-long = <2>;
+ bm,pool-short = <3>;
};

&i2c0 {
37 changes: 37 additions & 0 deletions ...t/linux/mvebu/patches-5.15/003-v5.11-ARM-dts-turris-omnia-add-comphy-handle-to-eth2.patch
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From 9ec25ef84832209a8326f9a71fe3ba14f4bcf301 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Sun, 15 Nov 2020 14:59:18 +0100
Subject: ARM: dts: turris-omnia: add comphy handle to eth2
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

The eth2 controller on Turris Omnia is connected to SerDes. For SFP to
be able to switch between 1G and 2.5G modes the comphy link has to be
defined.

Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: f3a6a9f3704a ("ARM: dts: add description for Armada 38x ...")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/armada-385-turris-omnia.dts | 1 +
1 file changed, 1 insertion(+)

--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -129,6 +129,7 @@
status = "okay";
phy-mode = "sgmii";
phy = <&phy1>;
+ phys = <&comphy5 2>;
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
61 changes: 61 additions & 0 deletions ...t/linux/mvebu/patches-5.15/004-v5.11-ARM-dts-turris-omnia-describe-switch-interrupt.patch
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@@ -0,0 +1,61 @@
From d29b67c220caf5f4905e1f1576e71bcb6de4af9e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Sun, 15 Nov 2020 14:59:19 +0100
Subject: ARM: dts: turris-omnia: describe switch interrupt
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Describe switch interrupt for Turris Omnia so that the CPU does not have
to poll the switch. We also need to to set mpp45 pin to gpio function
for this.

Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Andreas Färber <afaerber@suse.de>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/armada-385-turris-omnia.dts | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)

--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -261,13 +261,18 @@

/* Switch MV88E6176 at address 0x10 */
switch@10 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&swint_pins>;
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
- dsa,member = <0 0>;

+ dsa,member = <0 0>;
reg = <0x10>;

+ interrupt-parent = <&gpio1>;
+ interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -320,6 +325,11 @@
marvell,function = "gpio";
};

+ swint_pins: swint-pins {
+ marvell,pins = "mpp45";
+ marvell,function = "gpio";
+ };
+
spi0cs0_pins: spi0cs0-pins {
marvell,pins = "mpp25";
marvell,function = "spi0";
90 changes: 90 additions & 0 deletions target/linux/mvebu/patches-5.15/005-v5.11-ARM-dts-turris-omnia-add-SFP-node.patch
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@@ -0,0 +1,90 @@
From add2d65962977caf23ca2fa21a2457d31b636574 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Date: Mon, 16 Nov 2020 13:24:22 +0100
Subject: ARM: dts: turris-omnia: add SFP node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Turris Omnia has an SFP cage that, together with WAN PHY, is connected
to eth2 SerDes via a SerDes multiplexor. When a SFP module is present,
the multiplexor switches the SerDes signal from PHY to SFP.

Describe the SFP cage, but leave it disabled. Until phylink has support
for such configuration, we are leaving it to U-Boot to enable SFP and
disable WAN PHY at boot time depending on whether a SFP module is
present.

Signed-off-by: Marek Behún <kabel@kernel.org>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King - ARM Linux admin <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Uwe Kleine-König <uwe@kleine-koenig.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Andreas Färber <afaerber@suse.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/armada-385-turris-omnia.dts | 30 ++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)

--- a/arch/arm/boot/dts/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/armada-385-turris-omnia.dts
@@ -82,6 +82,24 @@
};
};
};
+
+ sfp: sfp {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfp_i2c>;
+ tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
+ tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
+ rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
+ los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
+ maximum-power-milliwatt = <3000>;
+
+ /*
+ * For now this has to be enabled at boot time by U-Boot when
+ * a SFP module is present. Read more in the comment in the
+ * eth2 node below.
+ */
+ status = "disabled";
+ };
};

&bm {
@@ -126,10 +144,20 @@

/* WAN port */
&eth2 {
+ /*
+ * eth2 is connected via a multiplexor to both the SFP cage and to
+ * ethernet-phy@1. The multiplexor switches the signal to SFP cage when
+ * a SFP module is present, as determined by the mode-def0 GPIO.
+ *
+ * Until kernel supports this configuration properly, in case SFP module
+ * is present, U-Boot has to enable the sfp node above, remove phy
+ * handle and add managed = "in-band-status" property.
+ */
status = "okay";
phy-mode = "sgmii";
phy = <&phy1>;
phys = <&comphy5 2>;
+ sfp = <&sfp>;
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
@@ -195,7 +223,7 @@
/* routed to PCIe2 connector (CN62A) */
};

- i2c@4 {
+ sfp_i2c: i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
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