Schnizo SIMD support

[jogut445]

This branch introduces all the developments for the Schnizo SIMD unit. The key features are:

• schnizo_vfu: The SIMD unit, exposing two separate FU interfaces for the VLSU and the schnizo_vfu_unit
• schnizo_vfu_unit: Combination of the Spatz VAU and the VSLDU
• schnizo_vlsu: Spatz-based VLSU that supports two-cycle loads and single-cycle stores for aligned operations (if there is no conflicting read/write request)
• The Schnizo decoder and scoreboard are changed to support vector instructions and hazard tracking during standard execution
• The tracer of was modified to create traces for both VFU and VLSU
• During superscalar execution, Schnizo does not track any dependencies (there also is no rename table for vectors): both RAW and WAR conflicts are handled directly inside the VRF

For testing, there is compatibility for the Spatz ISA tests, and there are about 25 vfu_tests in test. Both of these sets also have an additional make target.

Additionally, there are also vfu_gemm and vfu_axpy folders that contain vector implementations for both of them.

The following things (among others) aren't super clean and might need changing:

• My fork of Spatz is included as a submodule under hw/spatz
• The generation of riscv_instr.sv was a bit of a nightmare: I couldn't find a way to combine the vector instructions with all the instructions already present in there without generating loads of conflicts and compilation errors. That is why there are a custom parse_opcodes and an opcodes-rvv-spatz in the sw/deps folder. This is very ugly...

Last week I did a rough cleanup of some files, but it is still possible that there are some dead code...