Releases: clesav/yasimavr
Releases · clesav/yasimavr
v0.1.2
What's Changed
Added support for bootloaders and self-programming features :
- Adding NVM section access control by @clesav in #74
- Support for interrupt vector table advance features by @clesav in #75
- XT architecture : Added support for BOOTLOCK & APCWP by @clesav in #78
- AVR architecture : added support for lockbit by @clesav in #79
- AVR architecture : added SPM peripheral model by @clesav in #81
Others:
- CI action update by @clesav in #76
- Simdump improvements by @clesav in #77
- Build correction by @clesav in #80
Full Changelog: v0.1.1...v0.1.2
v0.1.1
What's Changed
- Misc bug corrections by @clesav in #61
- Fix GDB path by @Erovia in #63
- Cycle timer API additions by @clesav in #64
- FW symbols support by @clesav in #65
- Remove unused attribute from Firmware class by @clesav in #66
- Dev Descriptor changes by @clesav in #67
- GDB_Stub bug correction by @clesav in #68
- Device library bug corrections by @clesav in #69
- New timer/counter (XT core) models by @clesav in #70
- Updated sphinx dependencies by @clesav in #71
- Added Device Library documentation by @clesav in #72
New Contributors
Full Changelog: 0.1...v0.1.1
v0.1
v0.0.4
What's Changed
Build:
- Added delvewheel repair step to the build process on Windows, to deploy the DLL dependencies with the extension modules
C++ library : - Comment rework to be Doxygen-readable and addition of Doxyfile
Bindings : - Added comparison operators to reg_addr_t binding
Device configurations : - Added TWI model and configuration for atmega48/88/168/328
- Added SPI model and configuration for atmega48/88/168/328
Full Changelog: v0.0.3...v0.0.4