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Tags: calebwat/vc-intrinsics

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v0.19.0

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 Add intrinsic for efficient matrix load/store/prefetch

The LSC block 2D operations require a matrix descriptor as an argument.
When the vISA finalizer creates the descriptor, it cannot optimize loop-
invariant instructions. So, the finalizer generates a lot of redundant
MOV instructions. This patch adds intrinsics for efficient matrix load,
store, and prefetch operations. The intrinsics take the user-defined
matrix descriptor, which can be properly optimized.

v0.18.0

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 Add an intrinsic for named barrier arrive/signal operation

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v0.17.0

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 Fixed warning from static code analyser

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v0.16.0

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 Add support for XeHPCVG platform

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v0.15.0

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Verified

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 Add support for Arrow Lake and Lunar Lake devices (#201)

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Co-authored-by: Victor Mustya <victor.mustya@intel.com>

v0.14.0

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 Prevent creation of scalable vectors

To create a vector IITDescriptor::getVector() should be called with isScalable arg explicitly set to false

v0.13.0

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 Mark new lsc_load_merge intrinsics as LSC ones

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v0.12.3

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Allow kernels to be referenced in @llvm.global.annotations

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v0.12.2

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Handle circular dependencies between structs

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v0.12.1

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LLVM 15 build fix

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