Cranelift: remove the udiv_imm instruction

cranelift/codegen/meta/src/shared/instructions.rs

@@ -1927,7 +1927,8 @@ pub(crate) fn define(
         .operands_in(vec![Operand::new("x", iB), Operand::new("y", iB)])
         .operands_out(vec![Operand::new("a", iB)])
         .can_trap()
-        .side_effects_idempotent(),
+        .side_effects_idempotent()
+        .inst_builder_imm_method(true),
     );
 
     ig.push(
@@ -1981,22 +1982,6 @@ pub(crate) fn define(
         .side_effects_idempotent(),
     );
 
-    ig.push(
-        Inst::new(
-            "udiv_imm",
-            r#"
-        Unsigned integer division by an immediate constant.
-
-        Same as `udiv`, but one operand is a zero extended 64 bit immediate constant.
-
-        This operation traps if the divisor is zero.
-        "#,
-            &formats.binary_imm64,
-        )
-        .operands_in(vec![Operand::new("x", iB), Operand::new("Y", &imm.imm64)])
-        .operands_out(vec![Operand::new("a", iB)]),
-    );
-
     ig.push(
         Inst::new(
             "sdiv_imm",

cranelift/codegen/src/legalizer/mod.rs

@@ -249,9 +249,6 @@ fn expand_binary_imm64(
         ir::Opcode::SremImm => {
             replace.srem(arg, imm);
         }
-        ir::Opcode::UdivImm => {
-            replace.udiv(arg, imm);
-        }
         ir::Opcode::UremImm => {
             replace.urem(arg, imm);
         }

cranelift/codegen/src/souper_harvest.rs

@@ -98,7 +98,6 @@ fn harvest_candidate_lhs(
                 | ir::Opcode::IrsubImm
                 | ir::Opcode::Imul
                 | ir::Opcode::Udiv
-                | ir::Opcode::UdivImm
                 | ir::Opcode::Sdiv
                 | ir::Opcode::SdivImm
                 | ir::Opcode::Urem
@@ -204,17 +203,6 @@ fn harvest_candidate_lhs(
                         let b = arg(allocs, 1);
                         ast::Instruction::Udiv { a, b }.into()
                     }
-                    (ir::Opcode::UdivImm, ir::InstructionData::BinaryImm64 { imm, .. }) => {
-                        let a = arg(allocs, 0);
-                        let value: i64 = (*imm).into();
-                        let value: i128 = value.into();
-                        let b = ast::Constant {
-                            value,
-                            r#type: souper_type_of(&func.dfg, val),
-                        }
-                        .into();
-                        ast::Instruction::Udiv { a, b }.into()
-                    }
                     (ir::Opcode::Sdiv, _) => {
                         let a = arg(allocs, 0);
                         let b = arg(allocs, 1);

cranelift/codegen/src/verifier/mod.rs

@@ -57,7 +57,7 @@
 //! Ad hoc checking
 //!
 //! - Stack slot loads and stores must be in-bounds.
-//! - Immediate constraints for certain opcodes, like `udiv_imm v3, 0`.
+//! - Immediate constraints for certain opcodes, like `iconst.i8 1234`.
 //! - `Insertlane` and `extractlane` instructions have immediate lane numbers that must be in
 //!   range for their polymorphic type.
 //! - Swizzle and shuffle instructions take a variable number of lane arguments. The number

cranelift/fuzzgen/src/function_generator.rs

@@ -925,7 +925,6 @@ static OPCODE_SIGNATURES: LazyLock<Vec<OpcodeSignature>> = LazyLock::new(|| {
                 (Opcode::GetReturnAddress),
                 (Opcode::Blendv),
                 (Opcode::X86Pmulhrsw),
-                (Opcode::UdivImm),
                 (Opcode::SdivImm),
                 (Opcode::UremImm),
                 (Opcode::SremImm),

cranelift/interpreter/src/interpreter.rs

@@ -598,7 +598,8 @@ mod tests {
         let code = "function %test() -> i32 {
         block0:
             v0 = iconst.i32 1
-            v1 = udiv_imm.i32 v0, 0
+            v2 = iconst.i32 0
+            v1 = udiv v0, v2
             return v1
         }";
 

cranelift/interpreter/src/step.rs

@@ -718,7 +718,6 @@ where
         Opcode::Sdiv => binary_can_trap(DataValueExt::sdiv, arg(0), arg(1))?,
         Opcode::Urem => binary_can_trap(DataValueExt::urem, arg(0), arg(1))?,
         Opcode::Srem => binary_can_trap(DataValueExt::srem, arg(0), arg(1))?,
-        Opcode::UdivImm => binary_can_trap(DataValueExt::udiv, arg(0), imm_as_ctrl_ty()?)?,
         Opcode::SdivImm => binary_can_trap(DataValueExt::sdiv, arg(0), imm_as_ctrl_ty()?)?,
         Opcode::UremImm => binary_can_trap(DataValueExt::urem, arg(0), imm_as_ctrl_ty()?)?,
         Opcode::SremImm => binary_can_trap(DataValueExt::srem, arg(0), imm_as_ctrl_ty()?)?,